Advanced Chipset Settings - Supermicro X6DVA-4G2 User Manual

X6DVA-4G2/X6DVA-EG2 User's Manual

Advanced Chipset Settings

This item allows the user to confi gure the Advanced Chipset settings.
NorthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel Lindenhurst
NorthBridge chipset.
Memory Remap Feature
Select Enabled to allow remapping of the overlapped PCI memory above the
total physical memory. The options are Enabled and Disabled.
Memory Mirroring/Sparing
This feature allows the user to enable the function of Memory Mirroring and
Sparing if memory confi guration supports this function. The options are Dis-
abled and Sparing.
SouthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel ICH SouthBridge
chipset.
CPU B.I.S.T. Enable
Select Enabled to enable the function of CPU Built In Self Test. The options
are Enabled and Disabled.
ICH Delayed Transaction
Select Disabled to set the South Bridge P2P Bridge Secondary Discard Timer
to 32 micro-seconds for the PCI 32-bit bus. Select Enabled to set the South
Bridge P2P Bridge Secondary Discard Timer to 4 micro-seconds for the PCI
32-bit bus.
ICH DCB
Select Enabled to activate the ICH DMA Collection Buffer to provide Type-F
DMA performance for all DMA channels, allowing the DMA controllers located
in the FPGA to move data between the CPU memory and the coprocessor. It
is ideal for systems whose CPU main memory can be directly accessed from
the FPGA.
Intel PCI-X Hub Confi guration
This feature allows the user to confi gure the settings for the Intel PCI-X Hub
chipset.
PXH Channel A (SCSI & Slot 5)/Channel B (Slot 6) Bus Frequency
This feature allows the user to set the maximum PCI bus speed to be programmed.
The options are Auto, 33MHz PCI, 66MHz PCI, 66MHz PCI-X M1, 100MHz
PCI-X M1, and 133MHz PCI-X M1. The default setting is Auto.
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