Supermicro X6DVA-4G2 User Manual page 56

X6DVA-4G2/X6DVA-EG2 User's Manual
Max CPUID Value Limit
This feature allows the user to set the maximum CPU ID value. Enable this
function to boot the legacy operating systems that cannot support processors
with extended CPUID functions. The options are Enabled and Disabled.
CPU TM Function
(*Available if supported by the CPU.)
This feature allows the user to activate the thermal monitor mechanism in the
system. TM1 allows the CPU to regulate its power consumption based upon
the modulation of the CPU Internal clock when the CPU temperature reaches
a pre-defi ned overheat threshold. The options are Disabled and TM1. (Note:
Select TM2 to allow the CPU to reduce its power consumption by lowering the
CPU frequency and the CPU voltage when the CPU temperature reaches a
pre-defi ned overheat threshold. TM2 is available only when it is supported by
the CPU and under the following conditions: Frequency >=3.6GHz FSB 800,
Frequency >=2.8GHz FSB 533. Please refer to Intel's web site for detailed
information.)
Execute Disable Bit
(*Available if supported by the OS and the CPU.)
Set to Enabled to enable the Execute Disable Bit to allow the processor to
classify areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from creating a fl ood
of codes to overwhelm the processor or damage the system during an attack.
Note: For more information regarding hardware/software support for this
function, please refer to Intel's and Microsoft's web sites.
C1E Support
(*Available if supported by the CPU.)
Set to Enabled to enable "Enhanced Halt State" to lower CPU voltage/fre-
quency to prevent CPU overheat. Note: please refer to Intel's web site for
detailed information.
Hardware Prefetcher
This feature allows the user to enable the Hardware Prefetcher function.If
"Disabled", the CPU will prefetch data at 64-bit per cache line. If Enabled, it
will fetch data at 128-bit per cache line.
Adjacent Cache Line Prefetch
This feature allows the user to enable the function of Adjacent Cache Line
Prefetch. If disabled, only one 64 byte line from the 128 byte sector is prefetched
(which contains the requested data). If enabled, both lines are prefetched no
matter whether they have or have not the requested data.
Single Logical Processor Mode
(*Available if supported by the CPU.)
Set to Enabled to allow the processor to operate in the "single core" mode,
allowing Logical Processor 0 CORE 0 to remain active only. The options are
Enabled and Disabled.
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