Test 2 Debug Messages - Sun Microsystems StorEdge A7000 Manual

External interrupt and clock cable diagnostic reference
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Variable
Description
ipend
Specifies the contents of the Symmetric Interrupt Pending register.
opend
Specifies the contents of the Symmetric Overrun Pending register.
over
Specifies the contents of the Interrupt Overrun register.
Both the interrupt status and interrupt register displays are repeated before the
interrupt under test is generated, after the interrupt is received, and after the
timeout timer interrupt occurs.
The program then displays one of the following messages:
This message is displayed before the interrupt is generated:
Just Before ISTS is written
This message is displayed after the interrupt is received:
XIACKn is connected to XIRQn
Variable
Description
n
Specifies the number associated with the external interrupt acknowledge and
request signals.
The following message is displayed after the timeout timer interrupt is received:
Timer interrupt

Test 2 Debug Messages

If you enabled debug messages during program initialization, the External Clocks
test displays the contents of the TS80 interrupt registers in the following format:
GIE=0xgie IEL=0xiel MASK=0xmask ISTS=0xists
IPEND=0xipend OPEND=0xopend OVERRUN=0xover
MSTC=0xmaster LTSTC=0xlocal LTR0=timer0 LTR1=timer1
Chapter 4
Program Messages
4-5

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