Frequency Time Accumulation Protection Function Ftaqfvr (81A); Verifying The Settings; Phasor Measurement Unit Res670 - Hitachi Relion RES670 Commissioning Manual

Phasor measurement unit
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Section 11
Testing functionality by secondary injection
11.6.4

Frequency time accumulation protection function FTAQFVR (81A)

Prepare the IED for verification of settings as outlined in section "Overview" and section "Preparing for
test" in this chapter.
11.6.4.1

Verifying the settings

Time measurement and the injection of current and voltage can be done using a common test
equipment.
Verification of the PICKUP value and time delay to trip
1.
Connect the test set for the injection of three-phase currents and three-phase voltages to the
appropriate current and voltage terminals of the IED.
2.
Ensure that the settings in the IED are appropriate, especially the PickupCurrentLevel,
FreqHighLimit, FreqLowLimit, VHighLimit and VLowLimit setting.
3.
Supply the IED with three-phase currents and voltages at their rated value.
4.
Slowly decrease the frequency of the applied voltage until it crosses the frequency high limit and the
BFI_3P signal appears.
5.
Check that the FREQOK signal appears.
6.
Compare the trip value to the set frequency high limit value.
7.
Decrease the frequency of the applied voltage until it crosses the frequency low limit and the
BFI_3P signal disappears.
8.
Check that the FREQOK signal disappears.
9.
Compare the reset value to the set frequency low limit value.
10. Readjust the frequency of the applied voltage (with steps of 0.001 Hz/s) to a value within the set
frequency band limit.
11. Ensure that the BFI_3P signal reappears.
12. Wait for a time corresponding to tCont and ensure that the TRIP and TRIPCONT signals are
generated.
13. Measure the time delay for the TRIP signal and compare it to the set value.
Verification of the ACCALARM value and time delay to trip
1.
Connect the test set for the injection of three-phase currents and three-phase voltages to the
appropriate current and voltage terminals of the IED.
2.
Ensure that the settings in the IED are appropriate for the default settings, especially the
PickupCurrentLevel, FreqHighLimit, FreqLowLimit, VHighLimit and VLowLimit setting.
3.
Supply the IED with three-phase currents and voltages at their rated value.
4.
Slowly decrease the frequency of the applied voltage until it crosses the frequency high limit and the
BFI_3P signal appears.
5.
Continuously change the frequency of the applied voltage, so that for a certain time the frequency is
outside the set band limit and falls gradually within the band limit.
6.
Count only the time when the frequency lies within the set frequency band limit. Wait for a time
corresponding to tAccLimit and ensure that the ACCALARM signal appears.
7.
Measure the time delay for the ACCALARM signal and compare it to the set value.
Extended testing
1.
To check the value of TRIPACC, repeat the above test case in such a way that the frequency of the
applied voltage is within the set frequency band when time approaches the tAccLimit setting value.
124
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Phasor measurement unit RES670

Commissioning manual

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