General Current And Voltage Protection Cvgapc; Built-In Overcurrent Feature (Non-Directional) - Hitachi Relion RES670 Commissioning Manual

Phasor measurement unit
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Section 11
Testing functionality by secondary injection
Document
revision
G
H
J
11.7.2

General current and voltage protection CVGAPC

Prepare the IED for verification of settings as outlined in section
for test"
in this chapter.
One of the facilities within the general current and voltage protection function CVGAPC is that the value,
which is processed and used for evaluation in the function, can be chosen in many different ways by the
setting parameters CurrentInput and VoltageInput.
These setting parameters decide what kind of preprocessing the connected three-phase CT and VT
inputs shall be subjected to. That is, for example, single-phase quantities, phase-to-phase quantities,
positive sequence quantities, negative sequence quantities, maximum quantity from the three-phase
group, minimum quantity from the three-phase group, difference between maximum and minimum
quantities (unbalance) can be derived and then used in the function.
Due to the versatile possibilities of CVGAPC itself, but also the possibilities of logic combinations in the
application configuration of outputs from more than one CVGAPC function block, it is hardly possible to
define a fully covering general commissioning test.
11.7.2.1

Built-in overcurrent feature (non-directional)

Procedure
1.
Go to Main menu /Test /Function test modes /Multipurpose protection /
GeneralCurrentVoltage(GAPC) /CVGAPC:x and make sure that CVGAPC to be tested is
unblocked and other functions that might disturb the evaluation of the test are blocked.
2.
Connect the test set for injection of three-phase currents to the appropriate current terminals of the
IED.
3.
Inject current(s) in a way that relevant measured current (according to setting parameter
CurrentInput) is created from the test set. Increase the current(s) until the low set stage trips and
check against the set trip value.
4.
Decrease the current slowly and check the reset value.
5.
Block high set stage if the injection current will activate the high set stage when testing the low set
stage according to below.
6.
Connect a TRIP output contact to the timer.
7.
Set the current to 200% of the trip value of low set stage, switch on the current and check the time
delay.
For inverse time curves, check the trip time at a current equal to 110% of the trip current at
t_MinTripDelay.
126
Product
History
revision
2.2.4
-
2.2.4
-
2.2.5
The harmonic restraint function changed to freeze the definite and IDMT timers.
The maximum value of the settings IMin1 and IMin2 has been decreased to 1000.0 %
of IBase.
Setting BlkLevel2nd was removed from the function.
Previously called stepwise settings t_DefOCx and tResetDef_OCx had their names
changed to t_OCx and tReset_OCx for more clear understanding.
© 2017 - 2022 Hitachi Energy. All rights reserved
1MRK 511 409-UUS Rev. K
"Requirements"
and section
Phasor measurement unit RES670
Commissioning manual
SEMOD56488-3 v4
"Preparing
SEMOD56488-9 v5

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