Table Of Contents - Advantech PCIE-1753 User Manual

Contents
Chapter 1
1.1
1.2
1.3
1.4
1.5
Chapter 2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Chapter 3
3.1
3.2
3.3
Appendix A
A.1
A.2
A.3
Appendix B
Overview...............................................1
Introduction ............................................................................................... 2
Features .................................................................................................... 2
Applications............................................................................................... 3
Installation Guide ...................................................................................... 3
Accessories............................................................................................... 3
Installation............................................5
Installation ................................................................................................. 6
Packing List............................................................................................... 6
Driver Installation ...................................................................................... 7
Software Utility .......................................................................................... 8
Software Development Using DAQNavi SDK ........................................... 8
FPGA Code Update .................................................................................. 8
Hardware Installation ................................................................................ 9
Figure 2.1 Device Manager ....................................................... 10
Signal Connections
Overview ................................................................................................. 12
Switch and Jumper Settings.................................................................... 12
Figure 3.1 Jumper and switch settings ...................................... 12
Figure 3.2 Selected jumper and switch settings ........................ 12
3.2.1 Keep Last Status (JP1) ............................................................... 13
Table 3.1: Power-On Configuration (JP1) ................................. 13
3.2.2 Port Direction Settings (JP2~JP25) ............................................ 13
Table 3.2: DI/O Channel Direction Configuration (JP2 ~ JP25) 13
Table 3.3: Summary of Jumper Settings ................................... 14
3.2.3 Board ID (SW1)........................................................................... 15
Table 3.4: Board ID ................................................................... 15
Pin Assignment Connections .................................................................. 16
3.3.1 Digital Input (TTL DI, Pull-Up/-Down) ......................................... 18
Figure 3.3 Digital input signal connection .................................. 18
Figure 3.4 Digital input signal connection using a switch as inter-
nally pulled-up .......................................................... 19
Figure 3.5 Digital input signal connection using a switch as inter-
nally pulled-down...................................................... 20
3.3.2 Digital Output (TTL DO) .............................................................. 21
Figure 3.6 Digital output signal connection............................... 21
Specifications
Digital Input ............................................................................................. 24
Digital Output .......................................................................................... 24
General ................................................................................................... 24
Block Diagram
vii
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PCIE-1753 User Manual