Evaluation Board Hardware; Power Supplies; Serial Communication; Ad5423 Device Address Pins - Analog Devices EVAL-AD5423SDZ User Manual

EVAL-AD5423SDZ

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The EVAL-AD5423SDZ requires a number of power supply
inputs for the AV , AV , AV
DD1 DD2
If there is only one positive rail available, connect the AV
to the AV pin via the AVDD1-AVDD2-SHRT link on the EVAL-
DD1
AD5423SDZ. The V supply can be selected from 3.3V_SDP
LOGIC
on the SDP-S board or V , through the JP1 and JP3 jumpers.
LDO
See Table 1 for more link options and the default link positions.
EVAL-AD5423SDZ operates with a power supply range from
−33 V on AV to +33 V on AV
SS
50 V between the two rails. AV
5 V and 33 V. In a typical operating condition, AV
AV = +24 V, and AV = −24 V.
DD1 SS
Table 1. EVAL-AD5423SDZ Link Option Functions
Link Default Position
AVDD1-AVDD2-SHRT Not inserted
JP1 Not inserted
JP2 Inserted
JP3 Inserted
JP4 Not inserted
JP5 Inserted
JP8 Inserted
JP10 Inserted
JP11 A
JP12 A
JP14 A
JP17 Not inserted
P2 Inserted
S1 Up
Middle (default)
Down
Evaluation Board User Guide
, and V pins on the AD5423.
SS LOGIC
with a maximum voltage of
DD1
requires a voltage between
DD2
= 5 V,
DD2
Function
Connects the AV
Selects 3.3 V from the
Selects the external reference ADR-REF as the input to REFIN.
Selects 3.3 V from the V
Selects the REFOUT pin as the input to the REFIN pin.
Powers external reference ADR-REF from the AV
Connects the VI
Connects the –V
Position A connects the LDAC pin to the ground position. Position B connects LDAC to the V
Position A connects the AD0 pin to the ground position. Position B connects the AD0 pin to the
V pin.
LOGIC
Position A connects the AD1 pin to the ground position. Position B connects the AD1 pin to the
V pin.
LOGIC
Connects the AV
Provides options to disconnect from the
external source.
In the up position, this link connects the RESET pin to the V
In the middle position (default), this link controls the RESET pin via the
In the right position, this link connects the RESET pin to the ground position pin.

SERIAL COMMUNICATION

The SDP-S board handles the communication to the EVAL-
AD5423SDZ via the PC. By default, the
pin the serial port interface (SPI) communication, controls the
DD2
RESET pin and the LDAC pin, and monitors the FAULT pin of
the AD5423.
The EVAL-AD5423SDZ can disconnect from the
and drive the digital signals from an external source by
removing the appropriate links on P2 (see Table 2). An option
to tie the RESET pin and the LDAC pin to high or low levels is
available through the S1 switch and the JP11 link.
AD5423 DEVICE ADDRESS PINS
The device address pins (AD0 and AD1) are used in conjunction
with the device address bits within the SPI frame to determine
which AD5423
The AD0 pin and the AD1 pin can be configured through the
JP12 and JP14 links (see Table 1).
pin to the AV pin.
DD2 DD1
SDP-S as the source for the V
pin of the AD5423
LDO
pin to the + V pin.
OUT SENSE
pin to the RETURN signal on the EVAL-AD5423SDZ.
SENSE
pin to the ground position pin for the unipolar supply option (current output only).
SS
SDP-S
Rev. 0 | Page 3 of 19
SDP-S
device is being addressed by the system controller.
pin.
LOGIC
as the source for the V pin.
LOGIC
pin (the maximum supply for the
DD2
board and to drive digital signals from an
pin.
LOGIC
SDP-S
UG-1554
board handles
SDP-S board
ADR4525 is 15 V).
pin.
LOGIC
board.