Port Bypass Circuit; Dual Pmc Interfaces; Rear-Panel I/O - Intel NetStructure ZT 4901 Technical Specification

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Intel® NetStructure
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select the detected device from the ZT 5524 BIOS Setup Utility Boot Menu, and place it in the
desired Boot Order.

Port Bypass Circuit

Fibre Channel A and B each incorporate an on-board port bypass circuit (PBC). The PBC provides
continuous connectivity to the SFP receptacles at the front, and to the J5 RPIO connector.

Dual PMC Interfaces

The ZT 4901 provides two 64-bit 66 MHz PCI Mezzanine Card (PMC) sites, both configured for
3.3 V PCI signaling. Front-panel access is provided for both sites. One PMC site (PMCA) maps
user I/O to the ZT 4901's J5 RPIO connector, as defined in the PICMG 2.3 specification.
For information about the ZT 4901's PMC interfaces, see
PMC Connectors".

Rear-Panel I/O

The following functions are available through the ZT 4901's J5 rear panel I/O connector:
•
PMCA User I/O
•
Fibre Channel A and B
•
IPMI
•
Rear Panel Eject Notification
See Appendix A, "J5 Rear Panel I/O Connector"
TM
ZT 4901 Mezzanine Expansion Card Technical Product Specification
Appendix A, "J11 - J13 and J21 - J24
for more information on the rear-panel I/O.
Introduction
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