Hot Swap Controller; System Management Bus; Fibre Channel - Intel NetStructure ZT 4901 Technical Specification

Introduction
2.2.7
2.2.8
2.2.9
Note: If a ZT 4901 Fibre Channel* controller port is to be used as a boot source from the front panel SFP
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Hot Swap Controller

The ZT 4901 draws local power through its J1 backplane connector. An on-board hot swap
controller manages the board's power up and over-current protection. The IOX board powers up at
the same time as its host processor board and uses the following power related signals for control
(on the Board-to-board connector):
•
MEZ_POR-: Output to the host processor board indicating that the IOX board is fully inserted
and that backplane voltages are valid.
•
SBC_HSPOR-: Input from the host processor board indicating that the host recognizes
MEZ_POR- and that the host is fully inserted and its backplane voltages are valid. This input
can be driven by the host's Baseboard Management Controller (BMC) to power down the
Mezzanine.
•
MEZ_PWROK: Output to host indicating that the IOX board's back end power is on and
voltages are valid. This output can be connected to the host's BMC for power-on/reset control.

System Management Bus

2
The ZT 4901 supports an I C compatible Bus to provide health monitoring functions and access to
vendor and factory information about the board. The IOX board extends both the IPMB power
(IPMB_PWR) from J1 and the Host I
2
connected to the Host I C interface are powered from the J1 IPMB_PWR. For information about
the monitoring features of the ZT 4901, see

Fibre Channel

Fibre Channel is a high-performance bi-directional serial data communication standard for use
between servers, mass storage subsystems, and peripherals. Fibre channel connections can be
point-to-point or routed through hubs or switches. Fibre Channel's long-distance, high-bandwidth
capability makes it ideal for storage area networks, computer clusters, and other data intensive
computing applications.
The ZT 4901 uses a QLogic* ISP2312 Fibre Channel Processor to provide two 2 Gbit channels
that are switched between the front-panel Small Form-Factor Pluggable (SFP) receptacles and the
J5 RPIO connector. The host processor board communicates to the Fibre Channel processor
through the J10 board-to-board interface.
to more information about the Qlogic ISP2312 Fibre Channel Processor.
An on-board option ROM contains BIOS setup information for the ZT 4901's Fibre Channel
processor. A serial EEPROM contains Fibre Channel configuration information such as the World
Wide Identification (WWID).
receptacle, the bootable Fibre Channel device must be connected to SFP receptacle B (either A or
B can be chosen if connected via the Rear Panel I/O J5 connector).
The bootable Fibre Channel device will then be detected by the ZT 5524 BIOS, and the user must
TM
Intel® NetStructure ZT 4901 Mezzanine Expansion Card Technical Product Specification
2
C interface to the J5 RPIO connector. On-board devices
Chapter 4, "System Monitoring and Management."
Appendix B, "Fibre Channel Processor" contains a link