Serial Data Switch; Serial Data Switch For Driver And Loadmod - NXP Semiconductors PN5331B3HN Manual

Near field communication (nfc) controller
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8.6.12 Serial data switch

8.6.12.1 Serial data switch for driver and loadmod

PN5331B3HN
Product data sheet
COMPANY PUBLIC
Two main blocks are implemented in the CIU. A digital block comprising state machines,
coder and decoder logic and an analog block with the modulator and antenna drivers,
receiver and amplifier. The Serial Data Switch is the interface between these two blocks.
The Serial Data Switch can route the interfacing signals to the pins SIGIN and SIGOUT.
SIGOUT and SIGIN are mainly used to enable the NFC-WI/S
to emulate card functionality with the PN533. SIGIN is capable of processing a digital
signal on transfer speeds above 424 kbit/s. SIGOUT pin can also provide a digital signal
that can be used with an additional external circuit to generate transfer speeds at
106 kbit/s, 212 kbit/s, 424 kbit/s and above.
Load modulation is usually performed internally by the CIU, via TX1 and TX2. However, it
is possible to use LOADMOD to drive an external circuitry performing load modulation at
the antenna (see optional circuitry of
The Serial Data Switch is controlled by the registers CIU_TxSel (see
page
172) and CIU_RxSel (see
The following figure shows the serial data switch for pins TX1 and TX2.
Internal
invert if
coder
INVMOD=1
invert if
SIGIN
POLSIGN=0
Fig 51. Serial data switch for TX1 and TX2
SIGIN is in general only used for secure IC communication. If TxMix is set to logic 1 (see
Table 218 on page
172), the driver pins are simultaneously controlled by SIGIN and the
internal coder.
The following figure shows the serial data switch for the LOADMOD pin.
All information provided in this document is subject to legal disclaimers.
Rev. 3.4 — 29 November 2017
Near Field Communication (NFC) controller
Figure 64 on page
Table 220 on page
173).
TxMIX
0
Envelope
1
AND
157534
PN5331B3HN
2
C interface in the secure IC
227).
Table 218 on
DriverSel
Tristate
00
01
10
1
To driver TX1 and TX2
11
0- -> ModGsN/P
1 -->CWGsN/P
© NXP B.V. 2017. All rights reserved.
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