4-6.4.1 Dram Clock/Drive Control - SOLTEK SL-PT880E-R Manual

4-6.4.1 DRAM Clock/Drive Control

Choose "DRAM Clock/Drive Control" in "Advanced Chipset Features"
and press <Enter>. The following sub-screen will appear for DRAM
Control configuration:
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
DRAM Timing
x SDRAM CAS Latency
x Bank Interleave
x Precharge to Active(Trp)
x Active to Precharge(Tras)
x Active to CMD(Trcd)
x REF to ACT/REF to REF(Trfc)
DRAM BUS Selection
DRAM Command Rate
Current FSB
Frequency
Current DRAM
Frequency
DRAM Clock This item allows you to set the DRAM Clock.
DRAM Timing This item allows you to set the DRAM Timing.
SDRAM CAS Latency With SDRAM Timing by SPD disabled, you can se-
Bank Interleave This value appears when "DRAM Timing" is set at
Precharge to Active
(Trp)
Active to Precharge
(Tras)
Active to CMD(Trcd) This value appears when "DRAM Timing" is set at
DRAM Clock/Drive Control
133MHz
133MHz
By SPD
Auto By SPD
2,5
Disabled
3T
6T
3T
15T
Auto
2T Command
This item is to show the current FSB Frequency.
This item is to show the current DRAM Frequency.
SPD (Serial Presence Detect) is located on the
memory modules, BIOS reads information coded in
SPD during system boot up.
Choices: By SPD; 100MHz;133MHz; 166MHz;
200MHz
Choices: Auto By SPD; Manual
lect the SDRAM CAS# (Column Address Strode)la-
tency manually. Choices: 1.5; 2.0; 2.5; 3.0
"Manual". Choices: 2 Bank; 4 Bank; Disabled
This value appears when "DRAM Timing" is set at
"Manual". Choices: 2T; 3T; 4T; 5T
This value appears when "DRAM Timing" is set at
"Manual". Choices: 6T; 7T; 8T; 9T
"Manual". Choices: 2T; 3T; 4T; 5T
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Chapter 4 BIOS Setup
Item Help
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