Advanced Chipset Features - Boser HS-6250 Manual

Celeron / coppermine / tualatin industrial single board computer
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4.6

Advanced Chipset Features

This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
CMOS Setup Utility-Copyright ©1984-2001 Award Software
Advanced Chipset Features
DRAM Timing By SPD
DRAM Clock
SDRAM Cycle Length
Bank Interleave
Memory Hole
System BIOS Cacheable
Video RAM Cacheable
Frame Buffer Size
AGP Aperture Size
AGP-4X Mode
AGP Driving Control
AGP Driving Value
OnChip USB
USB Keyboard Support
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
: Select Item + / - /PU/PD: Value
F5: Previous Values
F6: Fail-Safe Defaults
42
Item Help
[Enabled]
Menu Level
Host CLK
3
Disabled
[Disabled]
[Enabled]
[Enabled]
[8M]
[8M]
[Enabled]
[Auto]
DA
[Enabled]
[Disabled]
[Enabled]
[Enabled]
[Enabled]
[Disabled]
[Enabled]
[Disabled]
[Disabled]
F10: Save
ESC: Quit
F7: Optimized Defaults
F1: General Help

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