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•
P5: Power-down pin for the VCA section of the AFE5805. Grounded (default mode) or High (+3.3 VD)
for power-down mode.
•
P6, P10: AFE5805 ADC clock input selection: Transformer-based differential clock, single-ended
LVCMOS clock, or future clock option (needs U4 for support). The default mode uses the transformer-
based differential clock.
•
P7: MSP430 microcontroller JTAG interface
•
P8: MAX3221 (RS-232) power-off jumper. When the jumper is removed, MAX3221 is completely
powered off. In the default mode, the jumper is uninstalled because the USB interface is used.
•
P9: SPI™ interface for U4.
•
P11: TI internal use. Default is floating.
•
P12: Power-down pin for ADS. Active High (+3.3 VD). Floating for default mode.
•
P13: External ADS reference voltage inputs. Floating in the internal reference mode.
•
P14: EN_SM: In the default mode, P14 connects to +3.3 VD, and the state machine is enabled. The
AFE5805 is operated using only one SPI port (ADS SPI port).
•
P15: RST pin; connects to H4 in the default mode through 0-Ω resistors.
•
P16: Debug port for monitoring VCA and ADS SPI signals.
•
P19: TI internal use. Connects to 3.3 VD.
•
P20: INT/EXT reference mode selection. +3.3 VD for the internal reference mode (default); GND for
the external reference mode.
•
P22: Uses onboard 40-MHz clock or external clock through J13. The default mode uses the onboard
clock
•
P23: Power-on onboard 40-MHz clock generator. Default is on.
•
P18: Because U4 is uninstalled, this jumper must be set as
•
S1: MSP430 reset button
•
SW1, SW2: CW outputs summation switch. Individual CW output current can be summed through the
I/V translator U1 when its corresponding switch is set to ON.
2.3
Test Points
Multiple test points are provided on the EVM. Detail descriptions follow. Under normal operation mode, it
is unnecessary to measure voltages at most of these test points.
•
TP1: GND
•
TP2: GND
•
TP3: VCM
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TP4: Vcntl test point
•
TP5: GND
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TP6: GND
•
TP7: Test point, TI internal only
•
TP8: +5 V
•
TP9: CM
•
TP10:GND
•
TP11: -5 V
SLOU222C – March 2008 – Revised March 2015
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Copyright © 2008–2015, Texas Instruments Incorporated
Figure 4
shows
Board Configuration
7
AFE5805EVM
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