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This document assists in evaluating the AFE5809 highly integrated analog front-end devices through the
use of the AFE5809EVM Evaluation Module. Included are setup instructions, printed-circuit board art, bill
of materials, and schematics.
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SLOU338A - October 2012 - Revised November 2012
Submit Documentation Feedback
AFE5809EVM Evaluation Module
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Copyright © 2012, Texas Instruments Incorporated
SLOU338A - October 2012 - Revised November 2012
Contents
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List of Figures
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User's Guide
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AFE5809EVM Evaluation Module
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Summary of Contents for Texas Instruments AFE5809EVM
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Page 1: Table Of Contents
SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module This document assists in evaluating the AFE5809 highly integrated analog front-end devices through the use of the AFE5809EVM Evaluation Module. Included are setup instructions, printed-circuit board art, bill of materials, and schematics. Contents ........................ - Page 2 ....................CW Mode, ADC Clock ....................... CW Mode and Vcntl ......................LED Indicators ......................... Test Points ......................Bill of Materials AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
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Page 3: Overview
Overview This document is intended as a step-by-step guide through the AFE5809EVM Evaluation Module (EVM) setup and test. The EVM is shipped with a default configuration from the manufacturer. With this configuration, the onboard CMOS clock is used for a analog-to-digital converter sampling clock; the onboard oscillator is used for CW mode operation. -
Page 4: Software Installation And Operation
10. JP16 is set to enable the demodulator internal LDO, as shown in Figure Software Installation and Operation The AFE5809EVM GUI (SLOC254) can be downloaded from the TI Web site. Follow the directions in the Read Me First.pdf file to install the GUI and device driver. Test Setup Two EVMs are required to evaluate the AFE5809 device. -
Page 5: Power Up Afe5809
Power Up AFE5809 www.ti.com Power Up AFE5809 Power up the AFE5809EVM by applying +5 V and –5 V to the P1 connector. After power up is complete, five green LEDS and three red LEDS turn on as shown in Figure Figure 3. -
Page 6: Launch Afe5809 Gui
The GUI automatically configures the default setup. Select the ADC page to observe the default condition. Figure 4. Default Page for AFE5809 GUI AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 7: Default Adc State
Launch AFE5809 GUI www.ti.com Figure 5 shows the Default Condition on the ADC window. Figure 5. Default ADC State SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 8: Launch Tsw1400 Gui
TEST AFE5809 Step 1: Time Domain • Select the Time Domain page from the TSW1400 GUI. • Uncheck Overlay 'Unwrap Waveform'. AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 9: Tsw1400 Gui Configuration
TI FAE to troubleshoot the problem. • On the AFE5809 GUI, change Test Pattern from Ramp to None for the next step. SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 10: Step 2: Single Tone Fft
Select Frequency from the display control on the TSW1400 GUI to display the FFT. • Connect Channel 1 of the AFE5809EVM to a signal generator through a BP filter. If a BP filter is not present, the result is not good. -
Page 11: Step 3: Demodulator Mode
Connect trigger from sine burst source that is synced with the analog signal to TX_Sync_in at J11 • Connect same trigger to TSW1400 EVM trigger input at J11 SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 12: Hardware Setup For Demodulation Mode Capture
Adjust amplitude until there is no clipping of waveform. Figure 11. Analog Sine Burst with 20 Cycles at 10 MHz AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 13: Demod Quick Load Buttons
Try this process (TSW GUI Capture twice -> AFE GUI "TSW Capture") for the other test modes. • Under RF Test Mode, the output should look similar to the input. SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 14: Choose Trigger Mode
Under Demod M=4 I/Q Test Mode, also look at the "Separate Data" tab to view the I/Q separated Data. Figure 13. Choose Trigger Mode AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 15: Msb And Lsb Mismatch Raw Data For Sine Test Mode
TEST AFE5809 www.ti.com Figure 14. MSB and LSB Mismatch Raw Data for Sine Test Mode SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 16: Sine Test Mode Output Seen In The Demodulator Plot
TEST AFE5809 www.ti.com Figure 15. Sine Test Mode Output Seen in the Demodulator Plot AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 17: Rf Test Mode Output
TEST AFE5809 www.ti.com Figure 16. RF Test Mode Output SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 18: Demod M=4, Both I And Q Data Test Mode Output Raw Data
TEST AFE5809 www.ti.com Figure 17. Demod M=4, Both I and Q Data Test Mode Output Raw Data AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 19: Demod M=4 I/Q Test Mode, Separated Data
TEST AFE5809 www.ti.com Figure 18. Demod M=4 I/Q Test Mode, Separated Data SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 20: Hardware Setup, Cw Mode
Hardware Setup, CW Mode www.ti.com Hardware Setup, CW Mode Figure 19. Setup for CW Mode AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 21: Step 1: Switch To Cw Mode
• Go to the CW Mode page. • Check CW Mode Enable. Then LED41, LED42, and LED43 on AFE5809EVM all illuminate. • Select 500 Ω for the gain control feedback resistor. Figure 20. Switching From Default (ADC) Mode Panel to CW Mode Panel SLOU338A –... -
Page 22: Step 2: Apply Input And Observe Outputs
The GUI Gain Control Feedback Resistor can be used to vary the amplitude of the outputs. Figure 21. CW Outputs AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 23: External Clock For Cw Mode
23. The rest of the jumpers remain the same. 2. Connect the external generator as shown in Figure 3. Set the generator output to 65 MHz, 13 dBm. SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 24: External Adc Sampling Clock Configuration
Windowing option; otherwise, use Hanning or Hamming. Notice the spectrum spreading with non- coherence. Figure 24. GUI Screen for Windowing Option Selection AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... - Page 25 Hardware Setup, CW Mode www.ti.com 5. The test procedure is the same for the CMOS ADC clock. SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
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Page 26: External Vcntl
JP15 needs to be reconfigured to short the leftmost two pins. • A DC Voltage source is required to be connected to J14. Figure 25. External Vcntl Configuration AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 27: Board Configuration
Onboard 3.3-VA enable. The configuration must be set up as shown in Figure 2 in order to use the onboard 3.3 V. TP18VD +1.8-VD supply test point SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 28: Cw Mode, Adc Clock
Test points for USB data bus: From pin 1 to pin 9, the signals are D0, D4, D2, D1, D7, D5, D6, and D3 11.2 CW Mode, ADC Clock Figure 27. AFE5809EVM Jumper Locations AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright ©... -
Page 29: 11.3 Vcntl Control Input
External Vcntl input. The range is from 0 V to 1.5 V. Onboard Vcntl adjustment. Use JP15 pin 3 which has the text On-Board to monitor the Vcntl voltage level. SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 30: 11.4 Leds
Board Configuration www.ti.com 11.4 LEDs The AFE5809EVM has seven LEDs. Their locations are shown in Figure 29. Their ON and OFF states demonstrate the normal operation of the power supplies and the PLL status of the clock buffer. Figure 29. AFE5809EVM LED Location Table 5. -
Page 31: 11.5 Miscellaneous Test Points
Board Configuration www.ti.com 11.5 Miscellaneous Test Points Figure 30. AFE5809EVM Test Point Locations Table 6. Test Points Reference Designator Description TP11,TP14.TP15 AFE5809 device test pin DNC1, 2, and 3. Pins L5, M5 and M8 JP19 REFM voltage input JP44 RESET input. Short to reset AFE5809. -
Page 32: Evm Printed-Circuit Board Layouts And Schematics
EVM Printed-Circuit Board Layouts and Schematics Figure 31 through Figure 36 show the six layers of the AFE5809EVM board. Figure 31. Top Layer - Signal AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback... -
Page 33: Second Layer - Ground
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Figure 32. Second Layer - Ground SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 34: Third Layer - Power
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Figure 33. Third Layer - Power AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 35: Fourth Layer - Signal
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Figure 34. Fourth Layer - Signal SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 36: Fifth Layer - Ground
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Figure 35. Fifth Layer - Ground AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 37: Bottom Layer - Signal
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Figure 36. Bottom Layer - Signal SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 38: Schematics
EVM Printed-Circuit Board Layouts and Schematics www.ti.com 12.1 Schematics Power Figure 37. Schematic (Sheet 1 of 10) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 39: Schematic (Sheet 2 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com AFE5809 DEVICE Figure 38. Schematic (Sheet 2 of 10) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 40: Schematic (Sheet 3 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com VCA INPUT ADC OUTPUT Figure 39. Schematic (Sheet 3 of 10) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 41: Schematic (Sheet 4 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com Clock Buffer Figure 40. Schematic (Sheet 4 of 10) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 42: Schematic (Sheet 5 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com ADC CLOCK Figure 41. Schematic (Sheet 5 of 10) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 43: Schematic (Sheet 6 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com CW CLK Figure 42. Schematic (Sheet 6 of 10) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 44: Schematic (Sheet 7 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com VCON SINGLE TO DIFFERENTIAL CONVERTER Figure 43. Schematic (Sheet 7 of 10) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 45: Schematic (Sheet 8 Of 10)
EVM Printed-Circuit Board Layouts and Schematics www.ti.com CW Mixer Out Figure 44. Schematic (Sheet 8 of 10) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 46: Schematic (Sheet 9 Of 10)
The circuits are only coupled through the opto-isolators. Figure 45. Schematic (Sheet 9 of 10) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 47: Schematic (Sheet 10 Of 10)
This Circuit provides 3 options for populating Op-Amps for maximum flexibility Figure 46. Schematic (Sheet 10 of 10) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 48: Bill Of Materials
CAPACITOR,SMT,0402,C ER,47pF,50V,5%,NPO PANASONIC ECJ-0EC1H820J C156 CAP,SMT,0402 CAPACITOR,SMT,0402,C ER,82pF,50V,5%,NPO 06033C104JAT2A C5, C7, C8, C12, C15, C88, C90, C91, CAP,SMT,0603 CAPACITOR,SMT,0603,C ERAMIC,0.1uF,25V,5%,X7 AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... - Page 49 FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FERRITE FERRITE,SMT,0805,80 FB9, FB10, FB11, FB12, FB13, FB14, BEAD,SMT,2P OHM@100MHz,5A FB15, FB17, FB18 SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 50 IC,SMT,SOIC-8 LOW-NOISE VERY LOW DRIFT PRECISION VOLTAGE REFERENCE,2.5V TPS79601DCQR IC,SMT,SOT223-6 ULTRALOW-NOISE HI PSRR FAST RF 1-A LDO LINEAR REGULATOR,1.2- 5.5V AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 51 ERJ-2GEJ131 R28, R29, R30, R32, R43 RES,SMT,0402 RESISTOR,SMT,0402,THI CK FILM,5%,1/16W,130 PANASONIC ERJ-2GEJ391 R51, R52, R54, R55 RES,SMT,0402 RESISTOR,SMT,0402,THI CK FILM,5%,1/16W,390 SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 52 MINI-CIRCUITS ADT4-1WT T1, T2, T3 TRANSF,SMT,6P RF TRANSFORMER WIDEBAND, 2-775 MHz, 50 OHM BOURNS 3296W-1-103 VR2, VR3 TRIMPOT,THU,3P TRIMPOT,THU,10K,10%,0 .5W,100ppm,25T AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 53 RES,SMT,0603 ( UNINSTALLED PART ) PANASONIC ERJ-2GEJ49R9(UN) R65, R66, R67, R68, R69, R70, R77, R79 RES,SMT,0402 ( UNINSTALLED PART ) SLOU338A – October 2012 – Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 54 DUT1 TI Provided part SMT,135P,BGA,1mmLS,0 22PAD (TI Provided part) OSC,SMT,6P VX-7040-ECE-KXX-0-640M000 OSC1 OSC,SMT,6P VCXO,SMT,3.3V,640Mhz 5.0x7.5x1.8mm ( TI Provided part ) AFE5809EVM Evaluation Module SLOU338A – October 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 55 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 56 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 57 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 58 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated...
- Page 59 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
- Page 60 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 61 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
- Page 62 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...
- Page 63 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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