Advantech PCI-1243U User Manual
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Advantech PCI-1243U User Manual

4-axis stepping motor control card
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PCI-1243U
4-Axis Stepping Motor Control
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User Manual

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  • Page 1 PCI-1243U 4-Axis Stepping Motor Control Card User Manual...
  • Page 2 No part of this man- ual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reli- able.
  • Page 3 Product Warranty (2 years) Advantech warrants to you, the original purchaser, that each of its prod- ucts will be free from defects in materials and workmanship for two years from the date of purchase. This warranty does not apply to any products which have been repaired or...
  • Page 4 This product has passed the CE test for environmental specifications when shielded cables are used for external wiring. We recommend the use of shielded cables. This kind of cable is available from Advantech. Please contact your local supplier for ordering information.

  • Page 5: Table Of Contents

    1.4 Specifications................4 1.4.1 Digital Input / Output ..............4 1.4.2 General ..................4 1.5 Block Diagram................5 Figure 1.1:PCI-1243U 4-Axis Stepping Motor Control Card ..5 Chapter 2 Installation ............8 2.1 Hardware Installation..............8 2.1.1 Installing the Card in your Computer: ........... 8 2.2 Pin Assignments ................
  • Page 6 Figure 4.4:Pulse Calculation ............38 4.1.7 R6: Idling Pulse Register (3-bit) ..........39 4.1.8 R7: Environmental Data Register (1-bit) ........39 4.2 Programming PCI-1243U............40 4.2.1 I/O Control Register Map: ............40 4.2.2 Command Buffer Register Format ..........44 4.3 Command Modes................ 45 4.3.1 Start-Stop Commands ..............
  • Page 7 4.7.8 High Speed Origin Return Model ..........70 Appendix A Diagrams ............72 A.1 Jumper and Switch Layout ............72 A.2 PCI-1243U Block Diagram ............73 A.3 Output Circuit Diagram .............. 73 Appendix B Simple St. Motor Driver ....... 76 Figure B.1:Simple Stepping Motor Driver Block Diagram ..
  • Page 8 PCI-1243U User Manual viii...
  • Page 9 General Information If you have just purchased the PCI- 1243U, or just need to brush up on its features or specifications, you would want to read this chapter. Sections include: • Introduction • Features • Applications • Specifications • Block Diagram...

  • Page 10: Chapter 1 General Information

    (+ and -) for each stepping motor axis. User-Friendly Interface PCI-1243U has been designed to act as a user-friendly solution for your stepping motor control applications. Programming the PCI-1243U is very easy. Windows DLL drivers and a utility are provided, and they contain all the command functions needed for total control of your stepping motors.

  • Page 11: Features

    16 I/O TTL Compatible Channels • All inputs/outputs are optically isolated, providing 5000Vrms isolation protection • Command Interpreter provided that eases learning the PCI-1243U com- mand set 1.3 Applications • Precise X-Y-Z position control • Precise rotation control •...

  • Page 12: Specifications

    • Output capability: Open Collector, 150 mA/ch, Vmax = 30 V DC 1.4.2 General • Power Consumption: Normal: 340 mA/ 5 V Max: 500 mA / 5 V • Connector: 62-pin D-type connector • Board Dimensions: 183.5 x 99.06 mm • Operating Temperature: 0 ~70° C PCI-1243U User Manual...

  • Page 13: Block Diagram

    Decoder DATA DIR & OUTPUT PULSE ISOLATOR OUTPUT Buffer PCD-4541 2 Phase Stepping Motor Controller System ORG,EL+ INPUT EL- & ISOLATOR SD+,SD- IRQ Selecteor INPUTS DIGITAL OUTPUTS BLOCK DIGITAL INPUTS Figure 1.1: PCI-1243U 4-Axis Stepping Motor Control Card Chapter 1...
  • Page 14 PCI-1243U User Manual...
  • Page 15 Installation If you have not yet configured and/or installed your PCI-1243U, or need to change the configuration this chapter will give you the information you require. Sections include: • Hardware Installation • Pin Assignments • Limit Switch Configuration • Jumper Settings...

  • Page 16: Chapter 2 Installation

    Remove the screw that secures the expansion slot cover to the chas- sis. Save the screw to secure PCI-1243U. Carefully grasp the upper edge of the PCI-1243U card. Align the hole in the retaining bracket with the hole on top of the expansion slot, and align the gold striped edge connector with the expansion slot socket.

  • Page 17: Pin Assignments

    2.2 Pin Assignments This section assists with connecting the PCI-1243U’s 62-pin connector to a variety of stepping motor drivers. The following diagrams shows PCI-1243U’s pin connector assignments, and offer some examples of input/output circuit connections from the card to the driver. You should select the example that best supports your application needs and the capabilities of your stepping motor driver.
  • Page 18 Isolated Digital Input Pins IDIx Isolated Digital Input channels, x= 0~7 IDI_COM Common ground for IDI channels Isolated Digital Output Pins IDOx Isolated Digital Output channels, x=0~7 IDO_COM Common point for IDO channels EXT_GND Ground pin for IDO channels PCI-1243U User Manual...

  • Page 19: Input / Output Circuit Connections

    2.2.1 Input / Output Circuit Connections The figure below illustrates an example of PCI-1243U output connec- tions to the stepping motor driver. PCI-1243 KR-5MC-5M Motor Driver 390 Ohm CW/PULSE CCW+ 390 Ohm CCW- CCW/DIR EXT_GND Figure 2.2: Output Connections Example The following figure illustrates the connection of the pulse output pin to the external device.
  • Page 20 PCI-1243U provides 8 isolated DI channels and 8 isolated DO channels. With general purpose I/O points, users can control and monitor peripheral sensors in their applications. The following figures illustrate how the I/O points are connected. V = 12 ~ 24 Vdc IDI_COM (4.7k)

  • Page 21: Limit Switch Configuration)

    2.3 Limit Switch Configuration) PCI-1243U features 5 limit switches for additional control of output. (+)DIRECTION (-)DIRECTION TABLE MOTOR DRIVER Lim+ Lim- INPUT ISOLATOR OUTPUT ISOLATOR PULSE Figure 2.6: Limit Switches Chapter 2...

  • Page 22: Lim+/ Lim

    When the signal becomes inactive, the frequency ramps up again. V = 12 ~ 24 V DC nLCOM (4.7k) nSD+/nSD- nLCOM = ALCOM / BLCOM / CLCOM / DLCOM Figure 2.8: SD Switch Test Configuration PCI-1243U User Manual...

  • Page 23: Org

    This is the Origin point input. If this signal becomes active during origin return (refer to the control select modes), pulse output stops immediately. Although PCI-1243U caters for five limit switches on each axis, not all of them have to be operated in one application. Refer to following figure for an example of the usage of limit switches.

  • Page 24: Jumper Settings

    'normally closed'. Normally Closed V = 12 ~ 24 V DC EMG/Tri-STA Imax = 10 mA EXT_COM (4.7k / 1 W) Normally Open Figure 2.10: EMG / Tri_STA Test Configuration Note: The factory default is Normally Open. PCI-1243U User Manual...

  • Page 25: Setting The Boardid Switch (Sw1)

    Table 2.2. When there are multiple cards on the same chassis, this BoardID setting is useful for identifying each card's device number. We set the PCI-1243U’s BoardID switch to 0 at the factory. If you need to adjust this setting, please see below..

  • Page 26: Software Driver Installation

    Follow the installation instructions step by step to complete your DLL driver setup. Set up the PCI-1243U Motion Utility by referring to chapter 3. For further information on driver-related issues, an online version of Software Manual is available by accessing the following path: “Start”...
  • Page 27 Motion Utility This chapter introduces the Advantech Motion Manager utility. Sections include: • Introduction • Configuration • Motion Operations...

  • Page 28: Chapter 3 Motion Utility

    Once the utility is initialed, it will scan the system and list the existing PCI-1243U cards on the system with their BoardID number. If there is no PCI-1243U card detected by the utility, please double check if the card is properly plugged into the system.
  • Page 29 Figure 3.2: Accessing the PCI-1243U Card In the “Information” page, all DLL driver versions are listed so that you can easily check if the current driver in the system is up-to-date. Figure 3.3: Information Page Note You may download the driver from Advantech’s web site if necessary: http://www.advantech.com.tw/support/...

  • Page 30: Configuration

    Negative Logic, the pulse output channels will nor- mally be high. The choice depends on the type of motor driver. Pulse Mode: The output of PCI-1243U can be set as CW/CCW mode or Pulse/Direction mode in this column.

  • Page 31: Motion I/O Configuration Page

    Figure 3.4: Machine Configuration Page 3.2.2 Motion I/O Configuration Page HWLimtMode_P: The hardware limitation switch mode in positive direction. It can be “Normal Open” or “Normal Close”. HWLimtMode_N: The hardware limitation switch mode in negative direction. It can be “Normal Open” or “Normal Close”. SD_P: The “Slow-Down”...

  • Page 32: Home Configuration Page

    3.2.3 Home Configuration Page Home Mode: PCI-1243U supports four different Home modes, they are mode0, 1, 6, and 9. Choose the most suitable mode to get better homing accuracy. Please refer to Appendix C for detailed information on each Home mode.

  • Page 33: Motion Operations

    After finishing the configuration for each axis, the parameters can be applied to the PCI-1243U card by using “Apply to Axis” as shown in the following diagram. You can also press the “New” button to create a virtual PCI-1243U, and simulate the parameters.

  • Page 34: Point To Point Movement

    Stop_S: Once this button is pressed, the motor will decelerate to SV then stop. Stop_M: When the button is pressed the motor will stop immediately. Change DV: This is an advanced function of PCI-1243U that can change speed on the fly. DV can be changed directly without decelerating to ini- tial speed.
  • Page 35 Figure 3.8: Point to Point Movement Chapter 3...

  • Page 36: Home Function

    3.3.3 Home Function Home Mode: PCI-1243U supports four different Home modes, they are mode0, 1, 6, and 9. Users can choose the best fit mode to get the proper homing accuracy. Please refer to Appendix C for the detail definition of each Home mode, and 3.2.3 for parameter information.

  • Page 37: Digital I/O Operation

    3.3.4 Digital I/O Operation DO Mask State: PCI-1243U provides a mask option for each digital out- put bit. If the mask bit is not set, the output command will not affect the output status of the specific bit. DO State: Checking the box under the bit number can issue the status change command to the specific bit.
  • Page 38 PCI-1243U User Manual...
  • Page 39 This chapter is a good place to start getting to know and use the capabilities of the PCI-1243U to best suit your applica- tion. Sections include: • PCI-1243U Registers • Programming PCI-1243U •...

  • Page 40: Chapter 4 Register Programming

    The following sections describe these registers in detail. 4.1.1 R0: Preset Pulse Counter (24 bits) PCI-1243U has an internal preset countdown counter. By entering a num- ber of pulses, this preset counter will begin counting down from that point.

  • Page 41: R1: Fl Speed Register (13 Bits)

    4.1.2 R1: FL Speed Register (13 bits) This register is used to set the FL (initial/low) speed. To operate in high speed mode, PCI-1243U will start with the FL speed and then accelerate to the FH (final/high) speed. If a deceleration-stop command is entered during high-speed operation, PCI-1243U will decelerate.

  • Page 42: R3: Accel/Decel Rate Register (10 Bits)

    This register is used to select the acceleration (ramping up) and decelera- tion (ramping down) characteristics. If PCI-1243U executes a high-speed mode start, the motor starts at the FL speed entered in R1, and accelerates to the FH speed entered in R2.

  • Page 43: R4: Multiplier Register (10 Bits)

    = (Rf) x {(Reference clock freq.) / [8192 x (R4)]} When (reference clock)/ [8192 x (R4)]= 1 ... 1x mode When (reference clock)/ [8192 x (R4)]= 2 ... 2x mode For PCI-1243U, the reference clock frequency is 4.9152 [MHz], There- fore: (R4)= 600 (=258 hex) 1x mode...

  • Page 44: R5: Ramping-Down Point Register (16 Bits)

    The FL speed, FH speed, and the accel/decel rate determine the ramping- down point. Please note that in PCI-1243U, the R5 value is calculated by the user. The system will not define the R5 value automatically. Entering inappropriate values may stop the output of pulses during decel- eration, or cause PCI-1243U to operate longer at the FL speed after decel- eration.
  • Page 45 Speed R5 setting value is too small time Speed R5 setting value is optimal (several pulses at FL) time Speed R5 setting value is too large time Figure 4.3: Setting the Ideal Ramping-Down Point Chapter 4...
  • Page 46 F = (Rf) x (CLOCK)/ [8192 x (R4)] (2) Therefore, FL output frequency FL [PPS] and FH output frequency FH [PPS] are FL = (R1) x (CLOCK)/ [8192 x (R4)] (3) FH = (R2) x (CLOCK)/ [8192 x (R4)] (4) PCI-1243U User Manual...

  • Page 47: R6: Idling Pulse Register (3-Bit)

    , the number of pulses during T, [sec] is represented by the area of the trapezoid A-B-C-F = {[(FL) + (FH)]* Ted}/ 2(5) Substitute equations (1), (3) and (4) into equation (5) = {[(R2)^2 – (R1)^2] x (R3) x Multiplier} / [2 x 8192 x (R4)] When output 5 pulses at FL speed after the completion of the ramping- down, the set value of the ramping-down point register (R5) is R5 = P...

  • Page 48: Programming Pci-1243U

    4.2 Programming PCI-1243U PCI-1243U stores a selected command in a buffer. This command remains there until a new command is received. The only command that can be RESET, is the 'starting mode' command. 4.2.1 I/O Control Register Map: The following table depicts the PCI-1243U’s register I/O address map.
  • Page 49 Write Command Buffer 0x08 Read Status0 Write Data Register (LowerBit7 To Bit0) 0x09 Read Internal Data (Lower) Write Data Register (MiddleBit15 To Bit8) 0x0A Read Internal Data (Middle) Write Data Register (UpperBit23 To Bit16) 0x0B Read Internal Data (Upper) Write Command Buffer 0x0C Read...
  • Page 50 Z-Axis Limit Switch Control Status Write U-Axis Limit Switch Control Register 0x23 Read U-Axis Limit Switch Control Status Write 0x24 Read Limit switch status For each motion axis, four register addresses are used. One command buffer and three data buffers. PCI-1243U User Manual...
  • Page 51 Command Buffers: WR0, WR4, WR8 and WR12 Each of the three channels has a command buffer which enables individ- ual programming. Channel l's command buffer is BASE + 0, Channel 2's is BASE + 4, Channel 3's is BASE + 8 and Channel 4's is BASE + 12. A command can be written to any of the three buffers, and the appropriate channel will respond to the command.

  • Page 52: Command Buffer Register Format

    The remaining six bits contain command parame- ters. The command modes available are as follows: Selection modes Start-Stop Command selection Operation Mode Select command Register Select command Output Mode select command Please refer to section 4.3 for details on each command mode. PCI-1243U User Manual...

  • Page 53: Command Modes

    4.3 Command Modes The following sections describe all the available commands and their parameters in detail. 4.3.1 Start-Stop Commands Frequency Selection 0: Use FL frequency 1: Use FH frequency External start control 0: Do not inhibit a start 1: Inhibit the start command (till trigger) 0: Constant speed mode 1: High Speed mode...
  • Page 54 0 (no output of INT signal at stop) 1 (output of INT signal at stop) 1: The start command is set to standby. It will wait for the external start trigger to start motion. 0: Software start command will start motion immideately. PCI-1243U User Manual...

  • Page 55: Operation Mode Select Command

    R5. 0 (+) direction 1 (-) direction PCI-1243U supports two acceleration/deceleration modes. You can choose linear accel/decal mode by setting bit5 as ‘0’. On the other hand, if bit6 is set to ‘1’, then the acdel/decal profile will be S-curve.

  • Page 56: Register Select Command

    0. The INT terminal output is the result of an logical OR of this signal with the interrupt signal when stopped. To determine which source has caused the INT signal to be out- put, check Status0. PCI-1243U User Manual...
  • Page 57 Interrupt Control: Enable the interrupt by setting bit0 as ‘1’. When interrupt is activated it is necessary to read this specified bit0 to reset the interrupt. Kinds of registers and data bits Description Bits Setting Range Preset counter data 0 to 16,777,215 (FFFFFF) FL register W(R)

  • Page 58: Output Mode Select Command

    Low: the input signal will be ignored when pulse width < 800 ns High: the input signal will be recognized when pulse width < 800 ns PULSE / DIRECTION logic control PULSE / +dir and DIR/-dir output logic be changed as follows PCI-1243U User Manual...

  • Page 59: Status Registers

    4.4 Status Registers You can set the standard monitor or extension monitor by “Output mode select command” - Status0 does not have any restrictions on reading. Since Status1, Status2, and Status3 share their addresses with the lower data byte of the preset counter, there is a restriction on reading from them.

  • Page 60: Status0: Channel Status Buffers (Rd0, Rd4, Rd8 And Rd13)

    R0 ~ R7 by assigning the register with “register selection command”, and then read the specific address respectively. Also, Status1, Status2 and Status3 can be read in the extension monitor mode. On the following page are the definitions of each status register. PCI-1243U User Manual...
  • Page 61 Monitor -EL terminal 0: Off 1: On Monitor +EL terminal 0: Off 1: On Monitor ORG terminal 0: Off 1: On Monitor -SD terminal 0: Off 1: On Monitor +SD terminal 0: Off 1: On Status 1 bit configuration Monitor -PO terminal 0: Off 1: On Monitor +PO terminal...

  • Page 62: General I/O Registers

    Read IDO7 IDO6 IDO5 IDO4 IDO3 IDO2 IDO1 IDO0 This Register Is Read/Write IDO Output (D7~D0) 4.5.3 Base+12h: Read/Write IDI Port Write Read IDI7 IDI6 IDI5 IDI4 IDI3 IDI2 IDI1 IDI0 This Register Read IDI Port (D7~D0) PCI-1243U User Manual...

  • Page 63: Base+13H: R/W Idi Port Trigger Control Register

    4.5.4 Base+13h: R/W IDI Port Trigger Control Register Write D7 IDI_Ctl7 IDI_Ctl6 IDI_Ctl5 IDI_Ctl4 IDI_Ctl3 IDI_Ctl2 IDI_Ctl1 IDI_Ctl0 Read D7 IDI_Ctl7 IDI_Ctl6 IDI_Ctl5 IDI_Ctl4 IDI_Ctl3 IDI_Ctl2 IDI_Ctl1 IDI_Ctl0 IDI_Ctl7 ~ IDI_Ctl0: Isolated Digital Input channel interrupt Edge Trig- ger Control 0: IDIx (x = 7 ~ 0): Falling Edge Trigger 1: IDIx (x = 7 ~ 0): Rising Edge Trigger 4.5.5 Base+14h: IRQ Control/Enable Register Low Byte...

  • Page 64: Base+16H: Irq Status Low Byte

    1: INT is active for Motion or Timer functions Note This flag will be cleared while writing to the register 4.5.9 Timer Function Specification Clock Base : 1 MHz On Board OSC Timer Tick Base: 10 Clock Base (100 kHz) Timer Tick Width: 10 µs PCI-1243U User Manual...

  • Page 65: Base+18H: Counter Data Register Low Byte

    4.5.10 Base+18h: Counter Data Register Low byte Write Counter DATA (Low Byte) Read Counter DATA (Low Byte) 4.5.11 Base+19h: Counter Data Register High Byte Write Counter DATA (High Byte) Read Counter DATA (High Byte) 4.5.12 Base+1Ah: Counter Gate Control Register Write CNT_EN Read...

  • Page 66: Motion Status Register

    4.6.3 Base+1Eh: Software Reset PCD4541 Write Read D0: 1: Reset PCD4541 Chip 0: Active PCD4541 Chip Note: For the Reset Process, the time Interval must > 100 us. Outportb (Base+0x1E, 0x01); /* wait 100us */ Outportb (Base+0x1E, 0x00); PCI-1243U User Manual...

  • Page 67: Base+20H: X-Axis Limit Switch Control Reg./Status

    4.6.4 Base+20h: X-Axis Limit Switch Control Reg./Status Write LMT- LMT+ Read LMT- LMT+ D0 ~ D4: 1: Normal Close Input 0: Normal Open Input 4.6.5 Base+21h: Y-Axis Limit Switch Control Reg./Status Write LMT- LMT+ Read LMT- LMT+ D0 ~ D4: 1: Normal Close Input 0: Normal Open Input 4.6.6 Base+22h: Z-Axis Limit Switch Control Reg./ Status...

  • Page 68: Base+23H: U-Axis Limit Switch Control Reg./Status

    D0 ~ D4: 1: Normal Close Input 0: Normal Open Input 4.6.8 Base+24h: +/- Limit Switch Status Write Read ULMT+ ULMT- ZLMT+ ZLMT- YLMT+ YLMT- XLMT+ XLMT- D0 ~ D7: 1: Limit Switch Active 0: Limit Switch In-Active PCI-1243U User Manual...

  • Page 69: Example Of Reading Status Register

    4.6.9 Example of reading Status Register In this section, we will demonstrate how to get the emergency stop limit switch status by reading the Status Register. Step1: Setting the “Output Mode Select Command” and you can choose the .Monitor mode. as Standard monitor or Extension monitor. In Standard monitor mode user can get Status0 ~ 1, and in Extension monitor mode Status0 ~ 3 can be read.
  • Page 70 Status2 Of n-Axes = inportb(base+(CH*4+2)) Status3 Of n-Axes = inportb(base+(CH*4+3)) Step4: Get the EL+/EL status EL- = Status1.BIT0 EL+ = Status1.BIT1 EL- Of n-Axes = ((Status1 Of n-Axes) & 0x01 )>>0 EL+ Of n-Axes = ((Status1 Of n-Axes) & 0x02 )>>1 PCI-1243U User Manual...

  • Page 71: Typical Operational Procedures

    4.7 Typical Operational Procedures 4.7.1 Initialization Note: Before following the flow chart, user need to define the output mode first by setting R7. If user set R7 as “0”, then the output will be CW/CCW mode. Or user can choose Pulse/Direction Mode by setting R7 as “1”. Negative Logic Pulse output Logic?

  • Page 72: Setting Speed Data

    (setting is not required if automatic ramping- down setting mode is selected) Command Buffer <- 10000100(84H) Select the multiplier register Set middle byte (8:15) Set lower byte (0:7) Set multiplier data Wait 400 ns The order is important! PCI-1243U User Manual...

  • Page 73: Constant Speed Preset Model

    4.7.3 Constant Speed Preset Model Ramp down at set point Stop at pre- set count Execute the reset Command buffer <- 00001000(08H) command Effect the ramping For(+)direction: command buffer <- 01000100(44H) mode and select the For(-)direction: command buffer <- 01001100(4CH) direction Command Buffer <- 10000000(80H) Select the counter...

  • Page 74: High Speed Preset Model

    Set the number of Register bits 7-0 <- data, low-order 8 bits output pulse Wait for 400ns The order is important! Start Command Buffer <- 00010101(15H) The status (0)is read Waiting for completion of operation Bit 3=0? Completion of operation PCI-1243U User Manual...

  • Page 75: Constant Speed Continuous Mode

    4.7.5 Constant Speed Continuous Mode Immediate stop command Execute the reset Command buffer <- 00001000(08H) command For(+)direction: command buffer <- 01000000(40H) Effect the manual mode For(-)direction: command buffer <- 01001000(48H) and set the direction Enter the start For FL: Command Buffer <- 00010000(10H) command For FH: Command Buffer <- 00010001(11H) Enter the immediate...

  • Page 76: High Speed Continuous Mode

    For(-)direction: command buffer <- 01001000(48H) direction Enter the start For FH: Command Buffer <- 00010101(15H) command Command Buffer <- Enter the deceleration 00011100(1CH) stop command The status (0)is read Waiting for deceleration stop Bit 3=0? Completion of operation PCI-1243U User Manual...

  • Page 77: Constant Speed Origin Return Model

    4.7.7 Constant Speed Origin Return Model Stop by origin switch = ON Execute the reset Command buffer <- 00001000(08H) command Effect the origin return For(+)direction: command buffer <- 01000001(41H) mode and select the For(-)direction: command buffer <- 01001001(49H) direction Enter the start For FH: Command Buffer <- 00010000(10H) command For FL: Command Buffer <- 00010001(11H)

  • Page 78: High Speed Origin Return Model

    When the SD limit switch of the same direction as the preset direction in ¡˚ON¡±,the frequency ramps down to the rate of FL When the ORG limit switch is ¡˚ON¡±, pulse output stops and bit 3 of status 0 becomes 0 The status (0)is read Bit 3=0? Completion of operation PCI-1243U User Manual...
  • Page 79 Diagrams This chapter provides diagrams for some of the major functions of PCI- 1243U. Sections include: • Jumper and Switch Layout • PCI-1243U Block Diagram • Output Circuit Diagram...

  • Page 80: Appendix A Diagrams

    Appendix A Diagrams A.1 Jumper and Switch Layout PCI-1243U User Manual...

  • Page 81: Pci-1243U Block Diagram

    A.2 PCI-1243U Block Diagram Address Address Decoder DATA DIR & OUTPUT PULSE ISOLATOR OUTPUT Buffer PCD-4541 2 phase stepping controller system ORG,EL+ INPUT EL- & ISOLATOR SD+,SD- IRQ Selecteor INPUTS DIGITAL OUTPUTS BLOCK DIGITAL INPUTS A.3 Output Circuit Diagram EXT.VCC...
  • Page 82 PCI-1243U User Manual...
  • Page 83 Simple Stepping Motor Driver This chapter provides extra diagrams related to the simple stepping motor driver.

  • Page 84: Appendix B Simple St. Motor Driver

    Stepping Control Encoder Motor Circuit DIRECTION DC Power of Motor DC Power of Control Circuit Figure B.1: Simple Stepping Motor Driver Block Diagram 4.7K Pulse Direction POWER CONTROL CIRCUIT HALF FULL 18CV8 Figure B.2: Pattern Encoder Connection PCI-1243U User Manual...
  • Page 85 [0001] FB=1 FB=1 FB=0 FB=0 [1000] 0010 FB=0 FB=1 FB=0 FB=1 [0100] Output Pattern = [OD OC OB OA] FH = 1 in all states Figure B.3: JP1 at Full Step Control Appendix B...
  • Page 86 FB = 1 [1100] [0110] FB = 0 FB = 0 FB = 1 [0100] FB = 1 Output Pattern = [OD OC OB OA] FH = 0 In all states Figure B.4: JP1 at Half Step Control PCI-1243U User Manual...
  • Page 87 Motor's Power From Pattern Encoder Figure B.5: 4-Phase Stepping Motor Power Control Circuit Appendix B...
  • Page 88 PCI-1243U User Manual...
  • Page 89 Home Function An accurate home position is funda- mental for every precision machine. In order to manage the various require- ments for the home position, PCI- 1243U provides a total of 4 home modes. This chapter gives users an overview of each home mode and its characteristics.

  • Page 90: Appendix C Home Function

    Appendix C Home Function C.1 How to Read the Home Velocity Profile Since the homing process is quite complex, PCI-1243U provides a ‘Home Pattern Graph’ for each mode to give users a clear concept about how the home function proceeds.

  • Page 91: Home Mode0

    C.2 Home Mode0 In Home mode0, the motor will start up at low speed FL, and accelerate to high speed FH towards the home sensor. Once the home sensor is reached, the motor will decelerate. And then stop when the speed is down to FL.

  • Page 92: Home Mode1

    Then it will keep moving until it crosses the home sensor, and finally search the home signal again. HOME Case 1 Case 2 Case 3 Figure C.2: Velocity Profile of Home Mode1 PCI-1243U User Manual...

  • Page 93: Home Mode6

    C.4 Home Mode6 In Home mode6, the motor will start up at low speed FL, and accelerate to high speed FH towards the limit switch. Once the limit switch is reached, the motor will stop immediately. Case 1 Figure C.3: Velocity Profile of Home Mode6 Appendix C...

  • Page 94: Home Mode9

    Then it will keep moving until it crosses the home sensor, and finally search the home signal again. HOME Case 1 Case 2 Case 3 Figure C.4: Velocity Profile of Home Mode9 PCI-1243U User Manual...

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