Base+13H: R/W Idi Port Trigger Control Register; Base+14H: Irq Control/Enable Register Low Byte; Base+15H: Irq Control/Enable Register High Byte - Advantech PCI-1243U User Manual

4.5.4 Base+13h: R/W IDI Port Trigger Control Register

Write D7
IDI_Ctl7 IDI_Ctl6 IDI_Ctl5 IDI_Ctl4 IDI_Ctl3 IDI_Ctl2 IDI_Ctl1 IDI_Ctl0
Read D7
IDI_Ctl7 IDI_Ctl6 IDI_Ctl5 IDI_Ctl4 IDI_Ctl3 IDI_Ctl2 IDI_Ctl1 IDI_Ctl0
IDI_Ctl7 ~ IDI_Ctl0: Isolated Digital Input channel interrupt Edge Trig-
ger Control
0: IDIx (x = 7 ~ 0): Falling Edge Trigger
1: IDIx (x = 7 ~ 0): Rising Edge Trigger

4.5.5 Base+14h: IRQ Control/Enable Register Low Byte

Write D7
INT_IDI7 INT_IDI6 INT_IDI5 INT_IDI4 INT_IDI3 INT_IDI2 INT_IDI1 INT_IDI0
Read D7
INT_IDI7 INT_IDI6 INT_IDI5 INT_IDI4 INT_IDI3 INT_IDI2 INT_IDI1 INT_IDI0
INT_IDI7~ INT_IDI0:
0: Disable IDIx INT (x = 7 ~ 0)
1: Enable IDIx INT (x = 7 ~ 0)

4.5.6 Base+15h: IRQ Control/Enable Register High Byte

Write D7
INT_All
Read D7
INT_All
INT_All:
0: Disable INT of all channels
1: Enable INT of all channels
INT_Motion, INT_Timer:
0: Disable INT for Motion or Timer functions
1: Enable INT for Motion or Timer functions
D6 D5
D6 D5
D6 D5
D6 D5
D6 D5 D4
- - -
D6 D5 D4
- - -
D4 D3
D4 D3
D4 D3
D4 D3
D3 D2 D1
- - INT_Motion
D3 D2 D1
- - INT_Motion
55
D2 D1
D2 D1
D2 D1
D2 D1
D0
INT_Timer
D0
INT_Timer
Chapter 4
D0
D0
D0
D0