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Chipset Configuration
Warning! Please set the correct settings for the items below. A wrong configuration
setting may cause the system to malfunction.
North Bridge
This feature allows the user to configure the settings for the Intel North Bridge.
IIO Configuration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
Snoop Response Hold Off
Use this feature to set Snoop Response Hold Off value The default setting is 9.
IIO1 Configuration
IOU2 (IIO1 PCIe Port 1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4, x8, and Auto.
IIO1 Port 1A Link Speed
This item configures the link speed of a PCI-E port specified by the user. The
options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and Gen 3 (Generation 3) (8 GT/s).
IOU0 (IIO1 PCIe Port 2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IIO1 Port 2A Link Speed
This item configures the link speed of a PCI-E port specified by the user. The
options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and Gen 3 (Generation 3) (8 GT/s).
IIO1 Port 2C Link Speed
This item configures the link speed of a PCI-E port specified by the user. The
options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and Gen 3 (Generation 3) (8 GT/s).
4-11
Chapter 4: AMI BIOS
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