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This product, including software and docu- mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
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With the PCH C612 built in, the X10DRC/i- LN4+/-T4+ motherboard supports MCTP Protocol, and Intel® Node Manager 3.0. This motherboard is ideal for visualization, CRM, storage, and general server platforms. Please refer to our website (http://www.supermicro.com) for CPU and memory support updates. Manual Organization Chapter 1 erboard.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Conventions Used in the Manual Pay special attention to the following symbols for proper system installation: Warning: Important information given to ensure proper system installation or to prevent damage to the components or injury to yourself; Note: Additional information given to differentiate between models or instructions provided for proper system setup.
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Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Website: www.supermicro.com Europe Address: Super Micro Computer B.V. Het Sterrenbeeld 28, 5215 ML...
Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your motherboard.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual X10DRC/i-LN4+/-T4+ Motherboard Image Note: All graphics shown in this manual were based upon the latest PCB Revision available at the time of publishing of the manual. The motherboard you've received may or may not look exactly the same as the graphics shown in this manual.
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IPMI CODE CPU1 JSD1 Intel PCH JWD1 JPME2 CLOSE 1st JBT1 OPEN 1st LSI 3108 JS39 T-SGPIO1 SAS CTRL T-SGPIO2 S-SGPIO1 FANB Front CTRL Panel FAN1 Note: For the latest CPU/Memory updates, please refer to our website at http://www.supermicro.com/products/motherboard/ for details.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual X10DRC/i-LN4+/-T4+ Quick Reference COM1 IPMI_LAN LAN1/2 LAN3/4 JUIDB1 USB4/5 LAN CTRL LAN CTRL (3.0) USB 0/1 JIPMB1 CPU2 CLOSE 1st LEDM1 BIOS OPEN 1st JBAT1 BAR CODE BIOS MAC CODE LICENSE X10DRC/i-LN4+(-T4+) SAS CODE SAN MAC Rev.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual (CPU2) Slot1 PCI-Express 3.0 x8 Slot from CPU2 (CPU2) Slot2 PCI-Express 3.0 x8 Slot from CPU2 (CPU1) Slot3 PCI-Express 3.0 x16 Slot from CPU1 (CPU2) Slot4 PCI-Express 2.0 x4 in x8 Slot from CPU2 (CPU2) Slot5 PCI-Express 3.0 x16 Slot from CPU2 (CPU2) Slot6 PCI-Express 3.0 x8 Slot from CPU2...
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2400/2133/1866/1600 MHz in 24 slots Note: Memory speed support is depending on the CPUs used in the motherboard. For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/ products/motherboard. Please also refer to the DDR4 Memory Configuration Guide at http://www.supermicro.com/support/resources/ DIMM sizes •...
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual • ASpeed 2400 Baseboard Controller (BMC) supports IPMI_LAN 2.0 I/O Devices SATA Connections • SATA 3.0 Six (6) SATA 3.0 Ports support- ed by Intel PCH (I-SATA 0-5), Four (4) SATA 3.0 Ports support- ed by Intel SCU (S-SATA 0-3) •...
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• Power-on mode for AC power recovery • Intel ® Intelligent Power Node Manager 3.0 (Avail- able when the Supermicro Power Manager (SPM) is installed and special power supply used. See Page 1-14.) • Management Engine (ME) CPU Monitoring •...
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Gen2 x4 (7-0) (15-8) PE2 PE3 PE1 DM1 PROCESSOR2 9.6G PROCESSOR1 PE2 PE3 PE1 DM1 (15-0) SATA 6GB/s Gen2 x4 USB 3.0 I350/ x8 (8-15) USB 3.0 X540/ SAGEVILL PCH 612 I350/ x8 (0-7) X540/ SAGEVILL USB 2.0 PCI-E USB 2.0...
Chapter 1: Overview Processor and Chipset Overview Built upon the functionality and capability of the Intel E5-2600v3/v4 Series Proces- sors (Socket R3) and the Intel C612 PCH, the X10DRC/i-LN4+/-T4+ motherboard to address the diverse needs of next-generation data server platforms. With support of new Intel Microarchitecture 22nm (E5-2600v3)/14nm (E5-2600v4) Process Technology, the X10DRC/i-LN4+/-T4+ dramatically increases system per- formance for a multitude of server applications.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Special Features Recovery from AC Power Loss The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state.
Chapter 1: Overview ACPI Features way to integrate power management features throughout a system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as CD-ROMs, network cards, hard disk drives and printers. In addition to operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, and an operating system- BIOS data structures, while providing a processor architecture-independent imple-...
The following new advanced power management features are supported by this motherboard: ® Intel Intelligent Power Node Manager (NM) (Available when the Supermicro Power Manager [SPM] is Installed) The Intel ® Intelligent Power Node Manager 3.0 (IPNM) provides your system with Management Controller), your system must also have IPNM-compatible Manage- Note: IPNM 2.0/3.0 support is dependent on the power supply used in...
Standardized Warning Statements The following statements are industry-standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or Supermicro chassis. Battery Handling Warning! There is a danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended by the manufacturer.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Attention Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées conformément aux instructions du fabricant. ¡Advertencia! Existe peligro de explosión si la batería se reemplaza de manera incorrecta.
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Chapter 2: Installation Product Disposal Warning! Ultimate disposal of this product should be handled according to all national laws and regulations. Warnung Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes erfolgen. ¡Advertencia! Al deshacerse por completo de este producto debe seguir todas las leyes y regla- mentos nacionales.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Waarschuwing De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming met alle nationale wetten en reglementen. Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam- aging your system board, it is important to handle it very carefully. The following Precautions •...
Chapter 2: Installation Motherboard Installation Make sure that the locations of all the mounting holes for both motherboard and chassis match. Although a chassis may have both plastic and metal mounting fas- teners, metal ones are highly recommended because they ground the motherboard to the chassis.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Installing the Motherboard Note: Always connect the power cord last, and always remove it before adding, removing or changing any hardware components. 1. Install the I/O shield into the chassis. 2. Locate the mounting holes on the motherboard. 3.
CPU socket cap is in place and none of the socket pins are bent; otherwise, contact your retailer immediately. • Refer to the Supermicro website for updates on CPU support. Installing the LGA2011 Processor 1. There are two load levers on the LGA2011 socket. To open the socket cover,...
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual 2. Press the second load lever labeled 'Close 1st' to release the load plate that covers the CPU socket from its locking position. Pull the lever away Press down on the Load from the socket Lever labeled 'Close 1st' 3.
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Chapter 2: Installation plate. keys, which are semi-circle cutouts, against the socket keys. Socket Keys CPU Keys 6. Once they are aligned, carefully lower the CPU straight down into the socket. (Do not drop the CPU on the socket. Do not move the CPU horizontally or vertically.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual 7. With the CPU inside the socket, inspect the four corners of the CPU to make sure that the CPU is properly installed. Gently close Push down and lock the the load plate. lever labeled 'Close 1st'. 8.
Chapter 2: Installation Installing a Passive CPU Heatsink 1. Do not apply any thermal grease to the heatsink or the CPU die -- the re- quired amount has already been applied. 2. Place the heatsink on top of the CPU so that the four mounting holes are aligned with those on the Motherboard and the Heatsink Bracket underneath.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Removing the Heatsink Warning: We do not recommend that the CPU or the heatsink be removed. However, if you do need to uninstall the heatsink, please follow the instructions below to uninstall the heatsink to avoid damaging the CPU or the CPU socket. 1.
Chapter 2: Installation Installing and Removing the Memory Modules Note: Check Supermicro's website for recommended memory modules. CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Installing & Removing DIMMs 1. Insert the desired number of DIMMs into the memory slots, starting with P1-DIMM A1.
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2400/2133/1866/1600 MHz in 24 slots. Memory speed support is pending on the CPUs installed in your system. For the latest memory updates, please refer to our website a at http://www.supermicro.com/products/motherboard. For memory to work properly, follow the tables below for memory installation.
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Chapter 2: Installation Speed (MT/s); Voltage (V); Slot Per Channel (SPC) and DIMM Per Channel (DPC) DIMM Capacity Ranks Per (GB) DIMM and 3 Slots Per Channel Type Data Width 1DPC 2DPC 3DPC 1.2V 1.2V 1.2V 2133 1866 1600 RDIMM SRx4 16GB 2133...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Control Panel Connectors and I/O Ports The I/O ports are color coded in conformance with the industry standards. See the picture below for the colors and locations of the various I/O ports. Back Panel Connectors and I/O Ports BAR CODE MAC CODE BIOS...
Chapter 2: Installation Serial Ports Serial COM) Ports Two COM connections (COM1 & COM2) are located on the mother- board. COM1 is located on the Back- plane I/O panel. COM2, located next to CPU2 PCI-E Slot1, provides front access support. See the table on the Ground COM2 Video Connection...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Universal Serial Bus (USB) Back Panel USB (2.0) 0/1, 2/3 Two USB 2.0 ports (USB 0/1) and two USB 3.0 ports (USB 4/5), located on the I/O backpanel, provide backpanel USB_PN1 USB_PN0 USB support. In addition, two USB 3.0 USB_PP1 USB_PP0 headers, located on the motherboard,...
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Chapter 2: Installation GLAN/10G-LAN (TLAN) Ports & IPMI_LAN Port Four Ethernet ports (LAN1/2, LAN3/4) are located on the I/O backplane on the motherboard. These Ethernet ports support Gigabit LANs on the X10DRC/i-LN4+ and support 10G-LANs on the X10DRC/i-T4+. In addition, an IPMI_LAN, located above USB 0/1 ports, can be used for IPMI SOL (Serial-over LAN) support.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual UID Switch UID LED is located on the IO back panel. Ground The front UID is located on pin 13 on the Ground Front Panel Control (JF1), and the front Button In UID LED is located on pin 7 on JF1. When UID LED you press the front or rear UID switch, both Status...
Chapter 2: Installation Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo- cated on a control panel at the front of the chassis. These connectors are designed descriptions of the various control panel buttons and LED indicators. Refer to the JF1 Header Pins BAR CODE MAC CODE...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual NMI Button NMI Button The non-maskable interrupt button header is located on pins 19 and 20 Control of JF1. Refer to the table on the right Ground Power LED Power LED The Power LED connection is located on pins 15 and 16 of JF1.
Chapter 2: Installation HDD/UID LED HDD LED The HDD LED connection is located on pins 13 and 14 of JF1. Attach a UID Switch cable to pin 14 to show HDD activity HD Active status. Attach a cable to pin 13 to use UID switch.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Overheat (OH)/Fan Fail/PWR Fail/ OH/Fan Fail/ PWR Fail/Blue_UID UID LED Connect an LED cable to pins 7 and Blue_UID LED 8 of the front control panel to use the OH/Fan Fail/Power Fail Overheat/Fan Fail/Power Fail and UID LED connections.
Chapter 2: Installation Reset Button Reset Button The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a Reset hardware reset switch on the computer Ground case. Refer to the table on the right for Power Button Power Button The Power Button connection is located...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Connecting Cables Power Connectors ATX Power 24-pin Connector A 24-pin main power supply connector (J24), and two 8-pin CPU power connec- +3.3V +3.3V tors (JPWR1/JPWR2) are located on the -12V (NC) +3.3V motherboard. These power connectors PS_ON must be connected to your power supply to provide adequate power to the system.
Chapter 2: Installation Fan Headers Fan Header This motherboard has nine system/CPU fan headers (Fan 1-Fan 6, Fan A-Fan Ground C) on the motherboard. All these 4-pin +12V fans headers are backward compatible Tachometer with the traditional 3-pin fans. However, PWR Modulation fan speed control is available for 4-pin fans only.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Internal Speaker Internal Buzzer The Internal Speaker (SP1) can be used to provide audible indications for Pin 1 Pos. (+) Beep In various beep codes. See the table on Pin 2 Neg. (-) Alarm Speaker DOM Power Connectors DOM PWR Two power connectors for SATA DOM (Disk_On_Module) devices...
Chapter 2: Installation TPM/Port 80 Header TPM/Port 80 Header A Trusted Platform Module/Port 80 header is located at JTPM1 to provide LCLK TPM support and Port 80 connection. LFRAME# <(KEY)> Use this header to enhance system LRESET# +5V (X) performance and data security. See LAD 3 LAD 2 +3.3V...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Power SMB (I C) Connector PWR SMB Power System Management Bus (I connector (JPI C1) monitors power Clock supply, fan and system temperatures. Data See the table on the right for pin PMBUS_Alert Ground +3.3V IPMB IPMB Header A System Management Bus header for IPMI 2.0 is located at JIPMB1.
Chapter 2: Installation T-SGPIO1/2 & S-SGPIO1 Headers T-SGPIO/S-SGPIO Headers Three SGPIO (Serial Link Gener- al Purpose Input/Output) headers are located on the motherboard. T- Ground Data SGPIO1/2 support onboard I-SATA Load Ground connections from the Intel PCH, and Clock S-SGPIO1 supports onboard S-SATA Note: NC= No Connection connections from the Intel SCU.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Jumper Settings Explanation of Jumpers Connector Pins To modify the operation of the mother- board, jumpers can be used to choose between optional settings. Jumpers create Jumper shorts between two pins to change the with a square solder pad on the printed Setting circuit board.
Chapter 2: Installation CMOS Clear JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such as a small screwdriver to touch both pads at the same time to short the connection. Note: Please completely shut down the system, and then short JBT1 to clear CMOS.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual VGA Enable VGA Enable Jumper Settings Jumper JPG1 allows the user to enable the onboard VGA connector. The default Enabled (Default) setting is on pins 1-2 to enable the con- Disabled nection. See the table on the right for jumper settings.
Chapter 2: Installation C Bus to PCI-Exp. Slots C for PCI-E slots Jumper Settings Use Jumpers JI C1 and JI C2 to con- nect the System Management Bus (I Pins 1-2 Enabled (Default) to PCI-Express slots to improve PCI Pins 2-3 Disabled performance.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Manufacturer Mode Select ME Mode Select Jumper Settings Close pins 2-3 of Jumper JPME2 to by- Normal (Default) tem to operate in the Manufacturer mode, Manufacture Mode the right for jumper settings. SAS Enable (For X10DRC-LN4+/T4+) SAS Enable Jumper Settings Close pins 1-2 of JPS1 to enable the...
Chapter 2: Installation LED Indicators LAN Port LEDs Activity LED Link LED LAN Port LEDs Four LAN ports (LAN 1/2 & LAN 3/4) are Activity LED Link LED located on the IO back panel of the moth- Rear View (when facing the erboard.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Onboard Power LED Onboard PWR LED Indicator An Onboard Power LED is located at LE2 LED States on the motherboard. When this LED is on, the system is on. Be sure to turn off the System Power Off system and unplug the power cord before Green: On System Power On...
Chapter 2: Installation SAS Heartbeat LED (for the X10DRC- SAS Heartbeat LED LED Settings LN4+/T4+ only) A SAS Heartbeat LED is located at DS13 Green: Blinking SAS: Normal on the motherboard. When DS13 is blink- SAS: Disabled or ing, SAS is working properly. Failed SAS Activity LED (for the X10DRC- SAS Activity LED...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual SAS Error LED (for the X10DRC- SAS Error LED LED Settings LN4+/T4+ only) A SAS Error LED is located at LEDS6 on Red: On A SAS Error has occurred. the motherboard. When LEDS6 is on, a SAS error has occurred.
Ground are faster than the connections of Parallel ATA. See SATA_RXN SATA_RXP Ground Note: please refer to the Intel SATA HostRAID User's Guide posted on our website @ http:// www.supermicro.com.. COM1 IPMI_LAN LAN1/2 LAN3/4 JUIDB1 A. I-SATA0 USB4/5 LAN CTRL LAN CTRL (3.0)
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual SAS 3.0 Ports (for the X10DRC-LN4+/T4+) Eight SAS 3.0 ports are located at JS39 on the motherboard. These SAS ports are supported by the LSI 3108 SAS controller. These SAS ports provide serial-link signal connections, which are faster than the connections of Serial ATA (SATA). COM1 A.
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual No Video 1. If the power is on, but you have no video, remove all the add-on cards and cables. 2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on beep codes. System Boot Failure If the system does not display POST or does not respond after the power is turned on, check the following:...
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2. Memory support: Make sure that the memory modules are supported by test- ing the modules using memtest86 or a similar utility. Note: Refer to the product page on our website http:\\www.supermicro. com for memory and CPU support and updates.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual tings in the IPMI to make sure that the CPU and System temperatures are within the normal range. Also check the front panel Overheat LED, and make sure that the Overheat LED is not on. 5. Adequate power supply: Make sure that the power supply provides adequate power to the system.
Technical Support Procedures Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards troubleshooting services. They should know of any possible problem(s) with the 1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Question' (FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.com/) before contacting Technical Support.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Battery Removal and Installation Battery Removal To remove the onboard battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Locate the onboard battery as shown below. 3. Using a tool such as a pen or a small screwdriver, push the battery lock out- wards to unlock it.
Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.supermicro.com.
Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, You can also request a RMA authorization online (http://www.supermicro.com/RmaForm/). This warranty only covers normal consumer use and does not cover damages in- curred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products.
When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. Note: the AMI BIOS has default text messages built in. Supermicro retains the option to include, omit, or change any of these text messages.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you have to update the BIOS, do not shut down or reset the system while the BIOS is updating to avoid possible boot failure.
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Day MM/DD/YYYY format. The time is entered in HH:MM:SS format. Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. Supermicro X10DRC-T4+ Series BIOS Version: This item displays the version of the BIOS ROM used in the system.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Use the arrow keys to select Advanced setup and press <Enter> to access the submenu items: Warning: Take Caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency or an incorrect BIOS timing setting may cause the system to malfunction.
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Chapter 4: AMI BIOS Wait For 'F1' If Error Select Enabled to force the system to wait until the <F1> key is pressed if an error occurs. The options are Disabled and Enabled. INT19 (Interrupt 19) Trap Response Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Immediate, the ROM BIOS of the host adaptors will "capture"...
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual This submenu displays the following CPU information as detected by the BIOS. It • Processor Socket • Processor ID • Processor Frequency • Processor Max Ratio • Processor Min Ratio • Microcode Revision • L1 Cache RAM •...
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Chapter 4: AMI BIOS illegal codes to overwhelm the processor to damage the system during an attack. The options are Enable and Disable. (Refer to Intel's and Microsoft's websites for more information.) PPIN Control Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) control in the system.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual AES-NI Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc- tions (NI) to ensure data security. The options are Enable and Disable. Intel Virtualization Technology Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d sup- port by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables.
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Chapter 4: AMI BIOS CPU C State Control (Available when Power Technology is set to Custom) Package C State limit Use this item to set the limit on the C-State package register. The options are C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state. CPU C3 Report Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the operating system.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Warning! setting may cause the system to become malfunction. North Bridge EV DFX (Device Function On-Hide) Features When this feature is set to Enable, the EV_DFX Lock Bits that are located on a processor will always remain clear during electric tuning. The options are Dis- able and Enable.
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Chapter 4: AMI BIOS II01 PORT 3A Link Speed options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation 3) (8 GT/s). II01 PORT 3C Link Speed options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation 3) (8 GT/s).
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Enable IOAT Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support, which ments and freeing the system resource for other tasks. The options are Enable and Disable. No Snoop Select Enable to support no-snoop mode for each CB device. The options are Disable and Enable.
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Chapter 4: AMI BIOS • Current QPI Link Frequency • QPI Global MMIO Low Base/Limit • QPI Global MMIO High Base/Limit • Link Frequency Select Use this item to select the desired frequency for QPI Link connections. The op- tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited. Link L0p Enable Select Enable for Link L0p support to reduce power consumption.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Data Scrambling Select Enabled to enable data scrambling to enhance system performance and data integrity. The options are Auto, Disabled and Enabled. DRAM RAPL (Running Average Power Limit) Baseline Use this feature to set the run-time power-limit baseline for DRAM modules. The options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.
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Chapter 4: AMI BIOS Patrol Scrub Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected on a memory module and send the correction to the requestor (the original source). When this item is set to Enable, the IO hub will read and write back one cache line every 16K cycles, if there is no delay caused by internal processing.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual XHCI Hand-Off This is a work-around solution for operating systems that do not support XHCI (Ex- tensible Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The settings are Enabled and Disabled. EHCI Hand-Off This item is for operating systems that do not support Enhanced Host Controller Interface (EHCI) hand-off.
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Chapter 4: AMI BIOS When this submenu is selected, AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the fol- lowing items: SATA Controller Select Enabled to enable the onboard SATA controller supported by the Intel PCH chip.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual display: Serial ATA Port 0~ Port 5 or not. Port 0 ~ Port 5 SATA Device Type (Available when a SATA port is detected) nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
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Chapter 4: AMI BIOS Port 0 ~ Port 5 Spin Up Device On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE- SET initialization to the device. The options are Enabled and Disabled. Port 0 ~ Port 5 SATA Device Type nected to a Solid State drive or a Hard Disk Drive.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual sSATA Port 0 ~ Port 3 Spin Up Device On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE- SET initialization to the device. The options are Enabled and Disabled. Port 0 ~ Port 3 sSATA Device Type nected to a Solid State drive or a Hard Disk Drive.
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Chapter 4: AMI BIOS sSATA Port 0~ Port 3 This item displays the information detected on the installed sSATA drives on the particular sSATA port. • Model number of drive and capacity sSATA Port 0~ Port 3 Disabled and Enabled. sSATA Port 0 ~ Port 3 Spin Up Device On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE- SET initialization to the device.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual The following PCI information will be displayed: • PCI Bus Driver Version • PCI Device Common Settings PCI Latency Timer Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are 32, 64, 96, 128, 160, 192, 224, and 248 (PCI Bus Clocks).
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Chapter 4: AMI BIOS ASPM Support Use this item to set the Active State Power Management (ASPM) level for a PCI-E device. Select Auto for the system BIOS to automatically set the ASPM level based are Disabled and Auto. Warning: Enabling ASPM support may cause some PCI-E devices to fail! MMIOHBase Use this item to select the I/O base memory size according to memory-address mapping for the PCH chip.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Super IO Chip AST2400 Serial Port 1/Serial Port 2 are Enabled and Disabled. Device Settings This item displays the base I/O port address and the Interrupt Request address of Change Port 1 Settings/Change Port 2 Settings of Serial Port 1 or Serial Port 2.
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Chapter 4: AMI BIOS COM1 Console Redirection Settings Terminal Type Use this item to select the target terminal emulation type for Console Redirec- tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual VT-UTF8 Combo Key Support Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Enabled and Disabled. Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server.
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Chapter 4: AMI BIOS SOL/COM2 Console Redirection Settings Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user. Terminal Type Use this feature to select the target terminal emulation type for Console Redirec- tion.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual VT-UTF8 Combo Key Support Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Enabled and Disabled. Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server.
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Chapter 4: AMI BIOS Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS) Out-of-Band Serial Port management. EMS Console Redirection Select Enabled to use a COM port selected by the user for EMS Console Redirec- tion. The options are Enabled and Disabled. *If the item above set to Enabled, the following items will become available for EMS Console Redirection Settings (Available when EMS Console Redirection is enabled)
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Flow Control the receiving buffer is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff. The setting for each these features is displayed: Data Bits, Parity, Stop Bits Trusted Computing (Available when a TPM device is installed and detected by the BIOS)
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EV DFX (Device Function On-Hide) support for the system to Bridge" submenu on Page 4-10). Note 2: For more information on TPM, please refer to the TPM manual at http://www.supermicro.com/manuals/other/AOM-TPM-9655V_9655H.pdf ACPI Settings WHEA Support Select Enabled to support the Windows Hardware Error Architecture (WHEA) plat-...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Event Logs Change SMBIOS Event Log Settings Enabling/Disabling Options SMBIOS Event Log Select Enabled to enable SMBIOS (System Management BIOS) Event Logging during system boot. The options are Enabled and Disabled. Runtime Error Logging Support Select Enable to support Runtime Error Logging. The options are Enable and Dis- Memory Correctable Error Threshold Use this item to enter the threshold value for correctable memory errors.
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Chapter 4: AMI BIOS When Log is Full Select Erase Immediately to immediately erase all errors in the SMBIOS event log when the event log is full. Select Do Nothing for the system to do nothing when the SMBIOS event log is full. The options are Do Nothing and Erase Immediately. SMBIOS Event Log Standard Settings Log System Boot Event Select Enabled to log system boot events.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual IPMI settings. BMC (Baseboard Management Controller) Firmware Revision IPMI Status System Event Log Enabling/Disabling Options SEL Components Select Enabled to enable all system event logging support at bootup. The options are Enabled and Disabled. Erasing Settings Erase SEL Select Yes, On next reset to erase all system event logs upon next system reboot.
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Chapter 4: AMI BIOS When SEL is Full This feature allows the user to determine what the AMI BIOS should do when the system event log is full. Select Erase Immediately to erase all events in the log when the system event log is full. The options are Do Nothing and Erase Immediately. Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Security Settings system. Password Check Select Setup for the system to prompt for a password upon entering the BIOS setup utility. Select Always for the system to prompt for a password at bootup and upon entering the BIOS Setup utility. The options are Setup and Always. Administrator Password Use this feature to set the administrator password which is required before entering the BIOS setup utility.
Chapter 4: AMI BIOS Boot Settings Setup Prompt Timeout Use this item to indicate how many seconds the system shall wait for the BIOS setup activation key to respond before the system starts to boot. The default setting is 1. Boot Mode Select Use this item to select the type of device to be used for system boot.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Delete Boot Option Use this item to select a boot device to delete from the boot priority list. Delete Boot Option Select the target boot device to delete. Hard Disk Drive BBS Priorities • Legacy Boot Order #1 Network Drive BBS Priorities •...
Chapter 4: AMI BIOS Save & Exit below. Discard Changes and Exit Select this option to exit from the BIOS setup without making any permanent Changes and Exit from the Exit menu and press <Enter>. Save Changes and Reset tion parameters to take effect. Select Save Changes and Exit from the Exit menu and press <Enter>.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual Save As User Defaults Select this item and press <Enter> to save the current BIOS settings as user's default settings for future use. Restore User Defaults ously saved for future use. Boot Override This feature allows the user to override the Boot priorities sequence in the Boot This is a one-time override.
Appendix A: BIOS POST Error Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed at each system boot, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue to boot.
Appendix B Software Installation Instructions B-1 Installing Software Programs The Supermicro ftp site contains drivers and utilities for your system at ftp://ftp. supermicro.com. Some of these must be installed, such as the chipset driver. After accessing the ftp site, go into the CDR_Images directory and locate the ISO Another option is to go to the Supermicro Website at http://www.supermicro.com/...
X10DRC/i-LN4+/-T4+ Motherboard User’s Manual B-2 Installing SuperDoctor5 The Supermicro SuperDoctor® 5 is a hardware monitoring program that functions in a command-line or web-based interface in Windows and Linux operating systems. The program monitors system health information such as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP).
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you need to update the BIOS, do not shut down or reset the system while the BIOS is updating to avoid possible boot failure.
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Root "\" Directory of a USB device or a writeable CD/DVD. Note: our website at www.supermicro.com to download the BIOS image into 2. Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB drive and power on the system 3.
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Appendix C: UEFI BIOS Recovery 4. After locating the new BIOS binary image, the system will enter the BIOS Recovery menu as shown below. Note: At this point, you may decide if you want to start with BIOS recovery. If you decide to proceed with BIOS recovery, follow the procedures below. 5.
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X10DRC/i-LN4+/-T4+ Motherboard User’s Manual 6. After the process of BIOS recovery is completed, press any key to reboot the system. drive. 8. When a DOS prompt appears, enter FLASH.BAT BIOSname.### at the prompt. Note: 9. After seeing the message that BIOS update is completed, unplug the AC power cable from the power supply to clear the CMOS, and then plug the AC power cable in the power supply again to power on the system.
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(Disclaimer Continued) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk.
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