S46/S46T Microwave Switch System Instruction Manual
Status model
The S46/S46T provides status registers and queues allowing the operator to monitor and
manipulate the various instrument events. The status structure is shown in
heart of the status structure is the status byte register. This register can be read by the
user's test program to determine if a service request (SRQ) has occurred, and what event
caused it.
Figure 3-4
Status model structure
Standard Event Registers
Event
Register
Operation Complete
OPC
Query Error
Device Specific Error
DDE
Execution Error
Command Error
CME
Power On
PON
(Always Zero)
*ESR?
Output Queue
Event Enable
Register
&
OPC
1
1
&
QYE
QYE
&
&
DDE
EXE
EXE
&
CME
&
6
6
&
PON
&
8
8
&
9
9
&
10
10
&
11
11
&
12
12
&
13
13
&
14
14
&
15
15
&
*ESE <NRf>
*ESE?
Error Queue
Status Byte
Register
0
1
EAV
3
MAV
ESB
RQS/MSS
7
*STB?
Logical
Master Summary Status (MSS)
OR
EAV
MAV
ESB
RQS/MSS = Request for Service/Master
Note: RQS bit is in serial poll byte,
MSS bit is in *STB? response.
Operation
Figure
Service Request
Enable Register
0
&
1
&
EAV
&
3
&
MAV
&
ESB
&
6
7
&
*SRE
*SRE?
= Error Available
= Message Available
= Event Summary Bit
Summary Status
S46-901-01 Rev. C / January 2006
3-15
3-4. The
Logical
OR