Anan-7000Dle Architecture; 7000Dle Mkii Design Team; Pa Board - Apache Labs ANAN-7000DLE MKII User Manual

1. ANAN-7000DLE MKII Architecture

7000DLE MKII Design Team

Phil Harman, VK6PH
Doug Wigley, W5WC
Dr. Warren C. Pratt, NR0V
Kjell Karlsen, LA2NI
Abhishek Prakash
Dr. Joe Martin, K5SO
John Melton, GØORX/N6LYT
Adam Farson AB4OJ/VA7OJ
Specifications
The ANAN-7000DLE MKII – Second to none!
Using Direct Down Conversion with an ultra low phase noise clock yields an RMDR of 116dB
@ 2Khz separation, this means that close in weak signals will not be masked by the receiver's
phase noise.
The transmitter specifications are also off the chart, use of a new 16-bit DAC with an ultra low
noise clock source results in transmit phase noise better than any other product available in the
market.
Use of LDMOS drivers and an optimized final Amplifier stage with adaptive Predistortion
Algorithm (PureSignal) yields transmit IMD of better than 60dB, this is at least 20dB better
than any Class A transmitter and over 30dB better than the competition.
Use of two 16-bit phase synchronous ADCs allow for advanced applications such as Diversity
reception for ultimate noise mitigation and effects of signal fading.
The ANAN-7000DLE MKII HF & 6M 100W SDR Transceiver offers top of the line performance in
a rugged package, it is based on the work of the OpenHPSDR community.
The new PA board incorporates the following updates over the previous 100W generation:
PA Gain redistribution for better IMD
Thermally compensated Bias
Current/Voltage/Temp Sensors
Temp controlled internal and option for external FAN
Independent BPFs and 6M LNAs for each ADC, option to ground ADC2 on Tx
Improved Tx SNR and higher duty cycle Tx
Copyright Apache Labs © page 6 26 February 2019