Reset; Can Transceiver; Serial Flash Memory - Infineon XMC4700 Relax Kit V1 Series Manual

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Evaluation Board for XMC4000 Family
XMC4700/XMC4800 Relax Kit Series-V1
2 Hardware Description
2.6

Reset

The reset pin (PORST#) of the XMC4700/XMC4800 is a bi-directional pin in open drain mode. An internal pull-up
resistor keeps the PORST# pin high during normal operation. A low level at this pin will force a hardware reset.
In case of a MCU internal reset the PORST# pin will drive a low signal.
A reset signal can be issued by
• the on-board Reset Button (SW102, "RESET")
• the on-board debug probe (IC101.46)
• the external debugger connected to the 10-pin Cortex
• the Arduino Power Header (X302.3, "RESET")
• the pin header X2 (X2.32, "RST#")
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An XMC internal circuit always ensures a save Power-on-Reset. XMC
components to generate a reset signal during power-up.
2.7

CAN Transceiver

The XMC4700 Relax Kit and the XMC4800 Relax EtherCAT Kit provide a CAN interface via the X2 connector.
Infineon's high speed CAN transceiver IFX1051LE for industrial application supports 3.3V I/O logic and is
suitable for 12V and 24V bus systems with an excellent EMC performance. The CAN bus (signals CANH, CANL) is
not terminated by a 120 Ohm and needs to be terminated externally.
Table 7 CAN Signals and XMC4700/XMC4800 Pin Mapping
Signal name Pin No. at Pin Header X2
CANH X2.33
CANL X2.35
CAN_TX –
CAN_RX –
2.8

Serial Flash Memory

The XMC4700 Relax Kit and the XMC4800 Relax EtherCAT Kit provide a 32 Mbit serial flash memory from Micron
(type: N25Q032A) interfaced to XMC4700/XMC4800 through a SPI interface. The SPI interface can be configured
as single, dual or quad SPI.
Table 8 XMC4700/XMC4800 Pins Mapping for Serial Flash Memory
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XMC Pin Function in qSPI Mode, XMC
Function
P4.2 Clock, U2C1.SCLKOUT
P4.3 Chip Select, U2C1.SELO2
P4.7 Data Line 0 I/O, U2C1.DOUT0
P4.6 Data Line 1, U2C1.DOUT1
P4.4 Data Line 3, U2C1.DOUT3
P4.5 Data Line 2, U2C1.DOUT2
Board User Manual
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Debug probe connector (X102)
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does not require any additional external
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XMC Pin, XMC
–
–
P1.12, CAN.N1_TXD
P1.13, CAN.N1_RXDC
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Function in SPI Mode, XMC
Clock, U2C1.SCLKOUT
Chip Select, U2C1.SELO2
Master Out Slave In (MOSI, MTSR), U2C1.DOUT0
Master In Slave Out (MISO, MRST), U2C1.DX0E
HOLD (low active)
Write Protection (low active)
13
Function
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Function
Rev. 1.4
2022-06-20