HP 8560E Service Manual page 527

Synthesizer Section
Unlocked Reference PLL (100 MHz VCXO)
20.If the loop is unlocked, and there is no signal at one of the
21.To remove the 10 MHz reference input to the phase/frequency
22.To remove the divided-down 100 MHz signal from the
Check the 100 23.Remove 10 MHz reference input to the phase/frequency detector by
MHz lock loop
integrator (steps
23-27)
The outputs of phase/frequency detector are low-pass filtered to reduce
NOTE
the 10 MHz component of the signal. The filtered signals are then
integrated by U506 and the result is fed to the tune line of the 100 MHz
VCXO.
24.Check that the voltage on A15J502 pin 3 is less than 0 Vdc. Refer to
25.Press
26.Check that the voltage on A15J502 pin 3 is greater than 13 Vdc.
27.If the loop is locked, the voltage on A15J502 pin 3 should be between
28.If the front panel CAL OUTPUT amplitude is out of specification
The 300 MHz CAL OUTPUT signal comes from the tripled 100 MHz
NOTE
which is passed through a leveling loop. The 300 MHz signal passes
through a low-pass filter for reducing higher harmonics. These
harmonics can fool the detector. The 300 MHz signal passes through a
variable attenuator controlled by PIN diode CR503 which is controlled
by the feedback loop. Diode CR504 is the detector diode (the same type
as CR505). Diode CR504 provides temperature compensation between
the reference voltage and the detected RF voltage.
526
phase/frequency detector inputs, one phase detector output will be at
TTL low and the other will be at TTL high. For example, if there is
no input signal at U504 pin 3, U504 pin 5 will be TTL low and U503
pin 9 will be TTL high. If there is no input signal at U503 pin 11,
U503 pin 9 will be TTL low and U504 pin 5 will be TTL high.
detector, press
AUX CTRL
signal applied to the rear panel 10 MHz REF IN/OUT connector.
phase/frequency detector, short R595. Refer to function block X of
A15 RF schematic.
pressing ,
AUX CTRL REAR PANEL
be connected to the rear panel 10 MHz REF IN/OUT connector.
function block P of A15 RF schematic.
,
AUX CTRL REAR PANEL
divided-down 100 MHz input to the phase/frequency detector by
shorting R572.
0 and +6 Vdc.
and cannot be brought within specification by adjusting A15R561,
CAL AMPTD, check the calibrator AGC amplifier with the following
steps. Refer to function block W of A15 RF schematic.
, , and
REAR PANEL 10 MHz EXT
, and
10 MHz EXT
, and
10 MHz INT
with no
. No signal should
and remove the
Chapter 10