Analog Devices AD9830 Instruction Manual page 2

AD9830–SPECIFICATIONS
Parameter
SIGNAL DAC SPECIFICATIONS
Resolution
Update Rate (f )
MAX
I Full Scale
OUT
Output Compliance
DC Accuracy
Integral Nonlinearity
Differential Nonlinearity
2
DDS SPECIFICATIONS
Dynamic Specifications
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range (SFDR)
Narrow Band
(± 50 kHz)
(± 200 kHz)
Wide Band (± 2 MHz)
Clock Feedthrough
Wake Up Time
Power-Down Option
VOLTAGE REFERENCE
Internal Reference @ +25°C
T to T
MIN MAX
REFIN Input Impedance
Reference TC
REFOUT Impedance
LOGIC INPUTS
V , Input High Voltage
INH
V , Input Low Voltage
INL
I , Input Current
INH
C , Input Capacitance
IN
POWER SUPPLIES
AVDD
DVDD
I
AA
I
DD
4
I + I
AA DD
5
Low Power Sleep Mode
NOTES
1
Operating temperature range is as follows: A Version: –40°C to +85°C.
2
All dynamic specifications are measured using IOUT. 100% production tested.
3
f = 6.25 MHz, Frequency Word = 5671C71C HEX, f
MCLK
4
Measured with the digital inputs static and equal to 0 V or DVDD.
5
The Low Power Sleep Mode current is 2 mA typically when a 1 MΩ resistor is
not tied from REFOUT to AGND.
The AD9830 is tested with a capacitive load of 50 pF. The part can be operated
with higher capacitive loads, but the magnitude of the analog output will be attenu-
ated. For example, a 10 MHz output signal will be attenuated by 3 dB when the
load capacitance equals 250 pF.
Specifications subject to change without notice.
1
(V = +5 V 5%; AGND = DGND = 0 V; T
DD
R = 1 k ; R
SET LOAD
AD9830A
10
50
20
1
± 1
± 0.5
50
–53
3
–72
–68
–50
–55
1
Yes
1.21
1.21 ± 7%
10
100
300
V –0.9
DD
0.9
10
10
4.75/5.25
4.75/5.25
25
6 + 0.5/MHz
60
0.25
1
10nF
= 2.11 MHz.
OUT
–2–
= T
A MIN
= 51 for IOUT and IOUT unless otherwise noted)
Units Test Conditions/Comments
Bits
MSPS max
mA max
V max
LSB typ
LSB typ
dB min f
MCLK
dBc max f
MCLK
f
MCLK
dBc min
dBc min
dBc min
dBc typ
ms typ
Volts typ
Volts min/max
MΩ typ
ppm/°C typ
Ω typ
V min
V max
µA max
pF max
f
OUT
V min/V max
V min/V max
mA max
mA typ
mA max
mA typ 1 MΩ Resistor Tied Between
mA max REFOUT and AGND
REFOUT REFIN FS
ADJUST
ON-BOARD
REFERENCE
FULL-SCALE
CONTROL
12
SIN
10-BIT
ROM
DAC
Figure 1. Test Circuit with Which Specifications Are
Tested
to T ; REFIN = REFOUT;
MAX
= f , f = 2 MHz
MAX OUT
= f , f = 2 MHz
MAX OUT
= 6.25 MHz, f = 2.11 MHz
OUT
= 2 MHz
R
SET
1kΩ
AVDD
10nF
COMP
IOUT
51Ω
IOUT
51Ω 50pF
REV. B
50pF