Terms And Acronyms - Xilinx Alveo X3522 User Manual

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Port 1
DSFP28
Port 2
DSFP28
Satellite
Controller
LPC5500
Series

Terms and Acronyms

The following table lists terms used in the guide and their definitions.
Table 2: Terms and Definitions
Term
AN, AN/LT
ARP
BASE-R FEC
CPU
CTPIO
DAC cable
DDR
DSFP
UG1523 (v1.0) October 18, 2022
Alveo X3522 User Guide
Figure 1: X3522 Block Diagram
QSPI Secondary
Flash
QSPI Primary
Flash
QSPI
GTY x4
XCUX35-3VSVA1365E
EP GTY x8
UART
SMBus
Auto-negotiation / Link Training.
Sets the speed of an Ethernet link.
Address Resolution Protocol.
Maps IP addresses to MAC addresses.
A type of Forward Error Correction also known as Firecode.
Central Processing Unit.
Cut Through Programmed Input/Output.
TX packets are streamed directly from the PCIe interface to the adapter port to deliver
lowest TX latency.
Direct Attach Copper cable.
Double Data Rate memory.
Transfers data on rising and falling edges of the clock.
Dual Small Form-factor Pluggable.
A 2-channel (dual) network transceiver design that is compatible with SFP+/ SFP28
transceivers. See https://dsfpmsa.org/.
DDR4 5x16
4/8 GB
x72
DDR C1
PCIe
Gen4 x8
Definition
Send Feedback
Chapter 1: Introduction
2xJTAG, 3xUART
PMBus, SMBus, SWDIO
X25588-052622
www.xilinx.com
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