SPARC
SPARC
FPU
IU
S4
Cache+
Cache
Cache
data
data
SBus address
SBus data
S4 RAM
16 SIMMs
SBus frame buffer board
Figure 1-4
System Overview
S4 MMU+
16K
64Kx8
x
24
Buffer
SBus
slots
S4
video
VRAM
Block Level Diagram of the Main Logic Board
SIA
Ethernet
SCSI
S4 DMA+
Serial communication
controllers
Boot PROM
NVRAM/TOD
Diskette drive
controller
Audio
1
7