Lvds Port1 (Cn18) - Aaeon GENE-APL6 User Manual

3.5” subcompact board
Table of Contents

Advertisement

2.6.18

LVDS Port1 (CN18)

N o te: LVDS LCD_PWR2 can be set to +3.3V or +5V by JP6. The driving current
supports up to 1.5A.
P in
P in Name
1
BKL_ENABLE
2
BKL_CONTROL
3
LCD_PWR
4
GND
5
LVDS_A_CLK-
6
LVDS_A_CLK+
7
LCD_PWR
8
GND
9
LVDS_DA0-
10
LVDS_DA0+
11
LVDS_DA1-
12
LVDS_DA1+
13
LVDS_DA2-
Chapter 2 – Hardware Information
PIN 29
PIN 30
PIN 1
PIN 2
Sig nal Type
OUT
OUT
PWR
GND
DIFF
DIFF
PWR
GND
DIFF
DIFF
DIFF
DIFF
DIFF
Sig nal Level
+3.3V/+5V
+3.3V/+5V
46

Advertisement

Table of Contents
loading

Table of Contents