Using The Reference Designs/Labs - Altera APEX DSP Development Kit User Manual

Getting Started
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Using the
Reference
Designs/Labs
Altera Corporation
APEX DSP Development Kit Getting Started User Guide
Refer to the following documents for more information:
Refer to the Filtering Lab White Paper, which is located in the
c:\MegaCore\dsp_development_kit-v1.0.0\labs\filtering\doc
directory, for more information on the filtering design and lab.
Refer to the APEX DSP Development Board (Professional Version) Data
Sheet or the APEX DSP Development Board (Starter Version) Data
Sheet—which are available in the
c:\MegaCore\dsp_development_kit-v1.0.0\doc directory—for
instructions on how to program the board with your own design.
Altera provides three labs and one reference design with the APEX DSP
development kit to help you get started building applications. Refer to the
white papers for each design, which are located in each design's doc
directory, for background information and lab exercises.
Filtering Design—This design uses two numerically controlled
oscillator (NCO) functions to generate two sine waves. The design
filters out one of the sine waves. This design uses a compiled
Windows application to communicate with the APEX DSP
development board. The filtering design is loaded into the APEX DSP
development board when you receive the kit.
Reed-Solomon Design— This design consists of a Windows application
in which you specify a picture to transmit over a channel using the
Reed-Solomon MegaCore function. You can use the application to
alter the type and intensity of errors inserted into the data as it passes
through the channel. The DSP development board implements the
hardware portion of the design, which includes the encoder, decoder,
and channel. The demonstration runs at 33 MHz.
Direct Sequence Spread Spectrum (DSSS) Design—The DSSS digital
modem reference design modulates direct sequence spread data onto
an IF carrier. The modulated data is input to a channel model and
passed to a digital receiver, which demodulates and recovers the data
from the received IF signal. The reference design also implements a
UART and an interface between it and the DSSS modem to allow
communication between the APEX DSP development board and
your PC.
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