Cpu - Renesas M3A-HS49 User Manual

2

2.2 CPU

The M3A-HS49 contains the 32-bit RISC microcomputer SH7149 that operates with a maximum 80MHz of CPU
clock frequency. The SH7149 includes 256-Kbyte flash memory, and 8-Kbyte SRAM, making it useful in a wide range
of applications from data processing to equipment control.
The M3A-HS49 can be operated with a maximum 80MHz of CPU clock frequency (external bus 40MHz, max) using
a 10MHz input clock.
Figure2.2.1 shows the block diagram of SH7149 in the M3A-HS49.
Clock
Mode
System
Control
NMI switch
MRES switch
User
LED
User DIP Switch
GPIO/SCI/
MTU2
Bus
Control
A/D
Converter
Rev.1.0 Dec 15, 2006
REJ10J0917-0100
EXTAL
XTAL
PA15/CK
MD1
MD0
FWE
WDTOVF
RES
NMI
PE13/MRES
PE0
PE9
PE11
PE12
PE14
PE15
PB0
PB16
PB17
PB18
PB1/BREQ/TIC5W
PE3/TIOC0D/SCK0
PE2/TIOC0C/TXD0
PE1/TIOC0B/RXD0
PE10/CS0
PA6/RD
PA7/WRH
PA8/WRL
PA9/WAIT
PF0/AN0
PF2/AN2
PF4/AN4
PF6/AN6
PF8/AN8
PF9/AN9
PF10/AN10
PF11/AN11
PF12/AN12
PF13/AN13
PF14/AN14
PF15/AN15
Figure2.2.1 Block Diagram of SH7149
SH7149
Serial Port RXD1
Connector
TXD1
IRQ0 Switch IRQ0
AUDATA0
H-UDI
AUDATA1
Connector
AUDATA2
AUDATA3
H-UDI
AUDCK
Connector
AUDSYNC
PE16/ASEBRKAK/ASEBRK
Functional Overview
PA0/A0
PA1/A1
PA2/A2
PA3/A3
PA4/A4
PA5/A5
PA10/A6
PA11/A7
PA12/A8
Address bus
PA13/A9
PA14/A10
PE4/A11
PE5/A12
PE6/A13
PE7/A14
PE8/A15
PB2/A16
PB3/A17
PB4/A18
PB5/A19
PD0/D0
PD1/D1
PD2/D2
PD3/D3
PD4/D4
PD5/D5
PD6/D6
Data bus
PD7/D7
PD8/D8
PD9/D9
PD10/D10
PD11/D11
PD12/D12
PD13/D13
PD14/D14
PD15/D15
PE19/TDO
PE18/TDI
H-UDI
PE17/TCK
Connector
ASEMD0
PE21/TRST
PE20/TMS
2.2 CPU
2-3