Table of Contents
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1
A
[3,4]
MD1
[3,4]
MD0
[3]
FWE
[4]
PA15/CK
[4]
_WDTOVF
[3,4]
_RESET
[4]
NMI
[4]
PE13/_MRES
[3,4]
PE15
[3,4]
PE14
[3,4]
PE12
[3,4]
PE11
[3,4]
PE9
[3,4]
PE0
[3,4]
PB18
[3,4]
PB17
[3,4]
PB16
[3,4]
PB0
B
[4]
PA9/_WAIT
[4]
PA8/_WRL
[4]
PA7/_WRH
[4]
PA6/_RD
[4]
PB1/_BREQ
[4]
PE10/_CS0
[4]
PE3/SCK0
[4]
PE2/TXD0
[4]
PE1/RXD0
[4]
PF0/AN0
[4]
PF2/AN2
[4]
PF4/AN4
[4]
PF6/AN6
[4]
PF8/AN8
[4]
PF9/AN9
[4]
PF10/AN10
[4]
PF11/AN11
[4]
PF12/AN12
[4]
PF13/AN13
[4]
PF14/AN14
[4]
PF15/AN15
C
VCC
VCC
X1
X1
R9
R9
18Ω
18Ω
XIN
4
3
VCC
OUT
CP1
CP1
0.1µF
0.1µF
2
1
GND
OE
SG8002CA_10.00MHz
SG8002CA_10.00MHz
10.00MHz
XOUT
R10
R10
1MΩ
1MΩ
X2
X2
3
1
10.00MHz
CERALOCK
D
Ver. 1.0
Ver. 1.0
Ver. 1.0
1
2
AVCC
U1
U1
SH7149
SH7149
71
MD1
72
MD0
70
FWE
XOUT
66
XTAL
XIN
67
EXTAL
R2
R2
0Ω
0Ω
45
PA15/CK/TXD1
65
_WDTOVF
64
_RES
69
NMI
9
PE13/TIOC4B/_MRES
6
PE15/TIOC4D/_IRQOUT
8
PE14/TIOC4C
10
PE12/TIOC4A
11
PE11/TIOC3D
13
PE9/TIOC3B
25
PE0/TIOC0A
26
PB18/_POE8
98
PB17/_POE7
97
PB16/_POE3
80
PB0/_BACK/TIC5WS
51
PA9/_WAIT/TCLKD/TXD2
52
PA8/_WRL/TCLKC/_POE6/RXD2
53
PA7/_WRH/TCLKB/_POE5/SCK2
54
PA6/_RD/_UBCTRG/TCLKA/_POE4
79
PB1/_BREQ/TIC5W
14
PE10/_CS0/TIOC3C
20
PE3/TIOC0D/SCK0
21
PE2/TIOC0C/TXD0
23
PE1/TIOC0B/RXD0
PF0/AN0
95
PF0/AN0
PF2/AN2
94
PF2/AN2
PF4/AN4
92
PF4/AN4
PF6/AN6
91
PF6/AN6
PF8/AN8
89
PF8/AN8
PF9/AN9
88
PF9/AN9
PF10/AN10
87
PF10/AN10
PF11/AN11
86
PF11/AN11
PF12/AN12
85
PF12/AN12
PF13/AN13
84
PF13/AN13
PF14/AN14
83
PF14/AN14
PF15/AN15
82
PF15/AN15
CP2
CP2
0.47µF
0.47µF
2
3
VCC_CPU
A0
63
PA0/A0/_POE0/RXD0
62
A1
PA1/A1/_POE1/TXD0
A2
60
PA2/A2/IRQ0/_POE2/SCK0
A3
58
PA3/A3/IRQ1/RXD1
A4
56
PA4/A4/IRQ2/TXD1
A5
55
PA5/A5/IRQ3/SCK1
A6
50
PA10/A6/RXD0
A7
49
PA11/A7/TXD0/_ADTRG
A8
48
PA12/A8/SCK0
A9
47
PA13/A9/SCK1
46
A10
PA14/A10/RXD1
A11
19
PE4/A11/TIOC1A/RXD1
A12
18
PE5/A12/TIOC1B/TXD1
A13
17
PE6/A13/TIOC2A/SCK1
A14
16
PE7/A14/TIOC2B
A15
15
PE8/A15/TIOC3A
A16
78
PB2/A16/IRQ0/_POE0/TIC5VS
A17
77
PB3/A17/IRQ1/_POE1/TIC5V
A18
76
PB4/A18/IRQ2/_POE4/TIC5US
74
A19
PB5/A19/IRQ3/_POE5/TIC5U
D0
44
PD0/D0/RXD0
43
D1
PD1/D1/TXD0
D2
42
PD2/D2/SCK0
D3
40
PD3/D3/RXD1
D4
38
PD4/D4/IRQ0/TXD1
D5
37
PD5/D5/IRQ1/SCK1
D6
36
PD6/D6/IRQ2/RXD2
D7
35
PD7/D7/IRQ3/TXD2
D8
34
PD8/D8/AUDATA0/SCK2
D9
33
PD9/D9/AUDATA1
32
D10
PD10/D10/AUDATA2
D11
31
PD11/D11/AUDATA3
30
D12
PD12/D12
D13
29
PD13/D13
D14
28
PD14/D14/AUDCK
D15
27
PD15/D15/_AUDSYNC
1
PE19/TDO/_RD/TIOC4BS
2
PE18/TDI/_CS1/TIOC4AS
3
PE17/TCK/_CS0/TIOC3DS
4
PE16/_ASEBRKAK/_ASEBRK/_WAIT/TIOC3BS
68
_ASEMD0
99
PE21/_TRST/_WRL/TIOC4DS
100
PE20/TMS/_WRH/TIOC4CS
75
PLLVSS
CP3
CP3
0.47µF
0.47µF
RENESAS SOLUTIONS CORPORATION
RENESAS SOLUTIONS CORPORATION
RENESAS SOLUTIONS CORPORATION
CHECKED
CHECKED
CHECKED
DRAWN
DRAWN
DRAWN
SCALE
SCALE
SCALE
06-12-08
06-12-08
06-12-08
DATE
DATE
DATE
3
4
VCC
R1
R1
A[0:19]
[3,4]
PA3/RXD1
PA4/TXD1
D[0:15]
[3,4]
D0
D1
D2
AUDATA0
D3
AUDATA1
D4
AUDATA2
D5
AUDATA3
D6
D7
D12
AUDCK
D13
_AUDSYNC
PF0/AN0
PE19/TDO [3,4]
PF2/AN2
PE18/TDI [3,4]
PF4/AN4
PE17/TCK [3,4]
PF6/AN6
PE16/_ASEBRKAK/_ASEBRK
[3,4]
PF8/AN8
_ASEMD0 [3]
PF9/AN9
PE21/_TRST [3,4]
PF10/AN10
PE20/TMS [3,4]
PF11/AN11
PF12/AN12
PF13/AN13
PF14/AN14
PF15/AN15
PA3/RXD1
PA4/TXD1
AUDATA0
AUDATA1
AUDATA2
AUDATA3
AUDCK
_AUDSYNC
VCC_CPU
Decoupling Caps
CP4
CP4
CP5
CP5
0.1µF
0.1µF
0.1µF
0.1µF
M3A-HS49
M3A-HS49
M3A-HS49
DESIGNED
DESIGNED
DESIGNED
APPROVED
APPROVED
APPROVED
CPU SH7149
CPU SH7149
CPU SH7149
DK30508
DK30508
DK30508
4
5
AVCC
0Ω
0Ω
H1
H1
1
AVCC
AVCC
A
VCC
5
1
10
2
3
4
RA1
RA1
A4.7KΩ
A4.7KΩ
6
7
8
B
9
R4
R4
4.7KΩ
4.7KΩ
R3
R3
4.7KΩ
4.7KΩ
VCC
1
5
2
10
3
RA2
RA2
4
6
A4.7KΩ
A4.7KΩ
7
8
9
R5
R5
4.7KΩ
4.7KΩ
R6
R6
4.7KΩ
4.7KΩ
R8
R8
4.7KΩ
4.7KΩ
R7
R7
4.7KΩ
4.7KΩ
PA3/RXD1 [4]
PA4/TXD1 [4]
C
AUDATA0 [3,4]
AUDATA1 [3,4]
AUDATA2 [3,4]
AUDATA3 [3,4]
AUDCK
[3,4]
_AUDSYNC
[3,4]
+
+
CP6
CP6
CP7
CP7
CP8
CP8
CE1
CE1
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
4.7µF
4.7µF
D
(
(
(
2
2
2
/
/
/
5
5
5
)
)
)
5
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