Input Timing Diagram; Power On/Off Sequence - Advantech IDK-2119 Series User Manual

3.4.2

Input Timing Diagram

3.5

Power ON/OFF Sequence

The VDD power and lamp ON/OFF sequence, in addition to the interface signals, are
shown below. Signals from any system should be in Hi-Z state or at a low level when
the VDD is off.
北京昌平阳坊镇极东未来产业园双创社区3层391
17
www.gcreat.cn
IDK-2119 User Manual
010 82795822