Input Signal Timing Specifications - Advantech IDK-2115N-K2XGB2 User Manual

4.1

INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown in the following table and timing dia-
gram.
Signal Item
Frequency
Period
Input Cycle
to Cycle Jit-
ter
Input Clock
to Data Skew
LVDS
Spread
Clock
Spectrum
Modulation
Range
Spread
Spectrum
Modulation
Frequency
Frame Rate
Total
Vertical
Display
Active
Term
Display
Blank
Total
Horizon-
tal Dis- Active
playTer Display
m
Blank
Note(1): Because this module is operated by DE only mode, Hsync and Vsync input
signals should be set to low logic level or ground. Otherwise, this module will operate
abnormally.
Note(2): The Tv(Tvd+Tvb) must be integer, otherwise, the module will operate abnor-
mally.
IDK-2115 User Manual
Symbol Min. Typ.
Fc 53.35 65
Tc 12.5 15.38
T
- -
rcl
TLVCCS -0.02*Tc -
F
clkin_
- -
mod
F
SSM
- -
Fr 55 60
Tv 780 806
Tvd 768 768
Tvb Tv-Tvd 38
Th 1240 1344
Thd 1024 1024
Thb Th-Thd 320
18
Max. Unit Note
80 MHz
18.75 ns
200 ns (a)
0.02*Tc ns (b)
1.02*Fc MHz (c)
200 KHz
70 Hz Tv=Tvd+Tvb
840 Th -
768 Th -
Tv-Tvd Th -
1360 Tc Th=Thd+Thb
1024 Tc -
Th-Thd Tc -