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2.7.1 Header Word Format
The first word (address zero) of each buffer contains a header word for the event data which follows and is
normally the first word readout during a block transfer. This header word contains the word count for that
event as well as parity, phase, buffer number, and geographic or logical address of the module. The word
count is automatically loaded into CSR5 when a Load Next Event command is issued.
FASTBUS block transfer data cycle, the word count register is decremented. The parity bit is high or low
so as to make the total number of bits in the header word even.
BYTE 3
G G G G G 0
0
0
31
30
29
28
27
26
25
24
2.7.2 Data Word Format
The 1881M time data is read out in 32 bit data word. The 13 least significant bits are the charge data and
the 6 bits from 17 through 22 are the channel identification. The most significant byte contains the
geographic address, parity, and the buffer number (modulo 4). Here again the parity bit is high or low so
as to make the total number of bits in the word even.
BYTE 3
G G G G G P
B B 0
31
30
29
28
27
26
25
24
July 23, 1998
1881M
HEADER WORD FORMAT
BYTE 2
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
LOGICAL ADDRESS
OR
GEOGRAPHIC ADDRESS
Figure 2-5 1881M Header Word
1881M DATA WORD FORMAT
BYTE 2
C C C C C C
0
23
22
21
20
19
18
17
16
CHANNEL NUMBER ( 0 - 63 decimal)
BUFFER NUMBER ( MODULO 4)
EVEN WORD PARITY
GEOGRAPHIC ADDRESS
Figure 2-6 1881M Data Word
2-10
BYTE 1
P
0
0
B B B B
B B W W W W W W W
15
14
13
12
11
10
9
8
BUFFER NUMBER
WORD PARITY
BYTE 1
0
0
D D D D D D D D D D D D D D
15
14
13
12
11
10
9
8
After each
BYTE 0
7
6
5
4
3
2
1
0
WORD COUNT
BYTE 0
7
6
5
4
3
2
1
0
DATA
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