Watchdog Timer Test - Advantech ROM-5420 User Manual

Risc-based smarc module with freescale i.mx6 arm cortex a9 processor
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/dev/ttymxc1, UART: undefined, Port: 0x0000, IRQ: 59
/dev/ttymxc2, UART: undefined, Port: 0x0000, IRQ: 60
/dev/ttymxc3, UART: undefined, Port: 0x0000, IRQ: 61
/dev/ttymxc4, UART: undefined, Port: 0x0000, IRQ: 62
3.1.13.1
UART2 Testing
#stty -F /dev/ttymxc1 -echo
#cat /dev/ttymxc1 &
#echo hello > /dev/ttymxc1
Hello
3.1.13.2
UART3 Testing
#stty -F /dev/ttymxc2 -echo
#cat /dev/ttymxc2 &
#echo hello > /dev/ttymxc2
Hello
3.1.13.3
/UART3 Testing
#stty -F /dev/ttymxc3 -echo
#cat /dev/ttymxc3 &
#echo hello > /dev/ttymxc3
Hello
3.1.13.4
UART4 Testing
#stty -F /dev/ttymxc4 -echo
#cat /dev/ttymxc4 &
#echo hello > /dev/ttymxc4
Hello
3.1.14

Watchdog Timer Test

Step 1: Executing' wdt_driver_test.out '
#/unit_tests/wdt_driver_test.out
Usage: wdt_driver_test <timeout> <sleep> <test>
timeout: value in seconds to cause wdt timeout/reset
sleep: value in seconds to service the wdt
test: 0 - Service wdt with ioctl(), 1 - with write()
Step 2: Please try below command to set timeout as 10 seconds, system will reboot
after then.
#/unit_tests/wdt_driver_test.out 10 5 0
Starting wdt_driver (timeout: 10, sleep: 5, test: ioctl)
Trying to set timeout value=10 seconds
The actual timeout was set to 10 seconds
Now reading back -- The timeout is 10 seconds
Press [CTRL+C] then you should be able to see below result:
imx2-wdt imx2-wdt.0: Unexpected close: Expect reboot!
Then system will reboot in 10 seconds
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ROM-5420 User Manual

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