Analog Devices MAX98365 Manual page 4

MAX98365 Evaluation Systems
Gain and Channel Selection
2
(I S/Left-Justified Mode)
The MAX98365's GAIN_SLOT pin is connected to the
center pin (pin 1) of the J7 header. When operating the
2
device in I S or left-justified mode, shunting pin 1 to the
adjacent pins of the J7 header controls the PCM gain.
Table 4 shows the available gain settings in I
justified modes.
2
In I S and left-justified modes, channel selection is con-
trolled by placing three shunts across the DAI configura-
tion headers J3, J4, or J5. Each of the DAI configuration
headers represent one valid mapping of the DAI pins to
the PCM input signals. See
settings for the DAI configuration headers. Only one DAI
configuration may be used at a time.
shunt positions used for DAI configuration A.
Channel Selection (TDM Mode)
In TDM mode, the MAX98365 has a fixed gain of 21.5dB
and the GAIN_SLOT pin becomes repurposed for TDM
channel selection. The MAX98365 accepts 8-channel
TDM data with either 16-bit or 32-bit data. The GAIN_
SLOT pin and DAI configuration are used to select which
of the 8 channels of TDM data the part responds to, as
shown in Table 6.
Table 4. J7 Jumper Selection
(GAIN_SLOT)
J7 SHUNT
GAIN (dB)
POSITION
21.5 1-5
18.5 Not Installed
15.5 1-3
12.5 1-2
9.5 1-4
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2
S and left-
Table 5 for the valid jumper
Figure 3 shows the
GAIN_SLOT
Connected to GND
Unconnected
Connected to VDD
Connected to VDD through
100kΩ resistor R1
Connected to GND through
100kΩ resistor R2
Evaluates: MAX98365A/MAX98365B/
MAX98365C/MAX98365D
Table 5. J3-J5 Header Selection
(DAI Configuration)
2
I S/LJ CHANNEL
Left
Right
Mono-mix
(Left/2 + Right/2)
Figure 3. DAI Configuration A (Left-Channel for I 2 S/Left-
Justified Operation)
SHUNT DAI
HEADER CONFIGURATION
J3 A
J4 B
J5 C
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