Figure 7 PCI Express Mini Card Example
If suspend mode operation is not required, then the 3.3VAUX pin may be tied to VCC_3V3. The WAKE#
pin should be left open in this case. The PERST# pin may be driven by COM Express CB_RESET# or
PCI_RESET#, or by buffered copies of the same.
3.5 PCI Express Signals—Routing Consideration
PCI Express (PCIe) signals are high-speed differential pairs with a nominal 100 differential impedance.
Route them as differential pairs, preferably referenced to a continuous GND plane with minimum via
transitions.
PCIe pairs need to be length-matched within a given pair (intra-pair), but the different pairs do not
need to be closely matched (inter-pair).
The following items should be observed when routing PCIe signals on the carrier board:
Control trace length according to "PCI Express insert loss budget" in the COM Express Specification.
Differential Impedance: 100 ohm ± 15%
Differential pair-to-pair spacing: minimum 20mils
COM Express Carrier Type 2
Design Guide
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