Lvds Trace Routing Guidelines; Routing Rules For Single-Ended Interfaces; Table 33 Lvds Trace Routing Guidelines - Emerson COM Express Carrier Design Manual

21.3.7 LVDS Trace Routing Guidelines

Table 33 LVDS Trace Routing Guidelines

Suggested trace parameters are shown. Using impedance calculation software is recommended
to determine trace width, distance to reference planes, and pair spacing applicable to your
specific project and PCB materials.

21.4 Routing Rules for Single-Ended Interfaces

The following is a list of suggestions for designing with single-ended signals. This should help
implement these interfaces while providing maximum COM Express carrier board performance.
 Do not route traces under crystals, crystal oscillators, clock synthesizers, magnetic devices, or ICs
that use or generate clocks.
 Avoid tight bends. When it becomes necessary to turn 90°, use two 45° turns or an arc instead of
making a single 90° turn.
 Stubs on signals should be avoided because stubs will cause signal reflections and affect signal
quality.
 Keep the length of high-speed clock and periodic signal traces that run parallel to high-speed signal
lines at a minimum to avoid crosstalk. Based on EMI testing experience, the minimum suggested
spacing to clock signals is 50 mil.
COM Express Carrier Type 2
Design Guide
Page 101 of 103