EKE-Electronics CVB1621A Technical Manual page 40

Command line interface
Address Contents
0x91 CVB Status register
Bit 7: not used
Bit 6: SJA1000 interrupt active, Channel B
0= interrupt not active
10 interrupt active
Bit 5: DCDC converter status, Channel B
0= Switch status is ERROR. When high-side switch controlling DCDC
converter gives an error flag, this status bit is cleared to 0, and converter is
disabled by FPGA. Poll this bit with software, and when found in ERROR
status, DCDC converter should be disabled by clearing DCDC enable–bit
(Bit 5 in 0x90), which also resets this status to OK. Restarting of converter
can be triedafter a time. Red led is lit when status is ERROR.
1= DCDC converter switch status is OK (Normally).
Status is also OK even when DCDC converter is not enabled.
Bit 4,3: not used
Bit 2: SJA1000 interrupt active, Channel A
0= interrupt not active 10 interrupt active
Bit 1: DCDC converter status, Channel B
0= Switch status is ERROR.
When high-side switch controlling DCDC converter gives an error flag, this
status bit is cleared to 0, and converter is disabled by FPGA. Poll this bit
with software, and when found in ERROR status, DCDC converter should
be disabled by clearing DCDC enable –bit (Bit 1 in 0x90), which also resets
this status to OK. Restarting of converter can be tried after a time. Red led
is lit when status is ERROR.
1= DCDC converter switch status is OK (Normally).
Status is also OK even when DCDC converter is not enabled.
Bit 0: not used
0xF0....0xFF FPGA Configuration ID register
Contains the version ID, maximum length 16 characters
EXAMPLE
You can inquire the status of DC/DC converters by directly reading the CVB Status
register contents with this command. In a normal situation, the value of a DC/DC
converter status bit is 1.
To inquire the DC/DC converter status, give the following command.
in 91
If the converters are ok, the following text is displayed.
91=22
These values are displayed in hexadecimal notation.
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CVB1621A and CVB2456A Technical Manual, ver. 3.00