The Bus state
It is a status register of the SJA1000 CAN controller (a hexadecimal value). The bit
fields of the bus state are explained in the table below:
Table 5.2:
Bus state addresses and contents of input ports
Bit
Name
7
Bus status
6
Error status
5
Transmit
status
4
Receive
status
3
Transmit
complete
status
2
Transmit
buffer status
1
Data overrun
status
0
Receive buffer
status
Rx errors
RX error counter register of the SJA1000 controller. It reflects the current value of
the receive error counter. A hexadecimal value.
Tx errors
TX error counter register of the SJA1000 controller. It reflects the current value of
the transmit error counter. A hexadecimal value.
CVB1621A and CVB2456A Technical Manual, ver. 3.00
Value
Function
1
bus-off; the CAN controller is not involved in bus
activities
0
bus-on; the CAN controller is involved in bus activities
1
error; at least one of the error counters has reached or
exceeded the warning limit
0
ok; both error counters are below the warning limit
1
transmit; the CAN controller is transmitting a message
0
idle
1
receive; the CAN controller is receiving a message
0
idle
1
complete; last requested transmission has been
successfully completed
0
incomplete; previously requested transmission is not yet
completed
1
released; the CPU may write a message into the
transmit buffer
0
locked; the CPU cannot access the transmit buffer; a
message is either waiting for transmission or is in the
process of being
1
overrun; a message was lost because there was not
enough space for that message in the RXFIFO
0
absent; no data overrun has occurred since the last
clear data overrun command was given
1
full; one or more complete messages are available in the
RXFIFO
0
empty; no message is available
Command line interface
31
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