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DP-4X HORIZONTAL DRIVE CIRCUIT EXPLANATION
HORIZONTAL DRIVE CIRCUIT DIAGRAM EXPLANATION:
(Use the Horizontal Drive Circuit Diagram for details)
CIRCUIT DESCRIPTION
When B+ (PSC connector pin 12) arrives at the Rainforest IC IY04 pin (45), horizontal drive is output from pin
(37). The drive signal is routed through the connector PDS2 pin 6 to the Horizontal Driver Transistor Q709. This
transistor switches the ground return for pin (8) of the Driver transformer (T702). SW+28 volts is routed through
D715 . Then through R748 and R730 and supplied to pin (5) as primary voltage. The switching of Q709 allows
EMF to develop. As this signal collapses, it creates a pulse on the output pin of (T702) at pin (4) to the base of
the Deflection Horizontal output transistor Q777. This transistor provides primary switching pulses for the De-
flection Transformer T701.
Q777 TRANSISTOR PRODUCES THE FOLLOWING OUTPUT PULSES;
1.
The Dynamic Focus OUT Circuit to QF01: A Dynamic Focus waveform, (Horz. Parabola) is created.
This is a parabolic waveform that is superimposed upon the static focus voltage to compensate for beam
shape abnormalities which occur on the outside edges of the screen because the beam has to travel fur-
ther to those locations.
Horizontal Deflection Yokes drive signals. The collector of Q777 provides the drive signal for all
2.
Horizontal Deflection Yokes.
3.
Primary switching for T701.
T701 TRANSFORMER PRODUCES THE FOLLOWING OUTPUT PULSES;
1.
H. Pulse from pin (7) For H. Blanking (H Blk) Generation.
2.
A 7.5V p/p H. Signal is added to the +28V line pin (9). This output pin (11) is call +28P to the Conver-
gence circuit.
3.
A 7.5V negative p/p H. Signal is added to the -28V line pin (10). This output pin (12) is call -28P to the
Convergence circuit.
HORIZONTAL BLANKING (H. BLK) GENERATED FROM PIN (7):
The Horizontal Pulse from pin (7) of T701 is routed to the Horizontal Blanking generation transistor Q706. This
transistor generates the 13V P/P called H Blk. This signal goes to the following circuits;
•
To the PDS2 connector pin 8 to pin (39) of IY04 as FBP In. Here this signal is used as a comparison
signal. It is compared to the reference signal coming in at pin (50) Horizontal Sync. If there are any dif-
ferences between these two signals, the output Drive signal from pin (37) is corrected.
•
NOTE: When a 1080i signal is input through component inputs, the Reference signal for Horizontal
Sync now becomes the H Sync before the Flex Converter. Output from sync selector IY05, pin (14).
•
(See the Main/Component Sync Circuit Diagram for details).
•
The H Blk signal is also routed to the Microprocessor which uses this signal for OSD positioning and
for Station Detection during Auto programming within the coincidence detector, also as a detection sig-
nal to activate the AFC Loop.
•
The PinP unit uses this signal for switching purposes. Like the read/write clock, positioning, etc...
•
Through the UKDG connector pin 32 to the Convergence circuit for correction waveform generation.
•
Through CN01 to the Sweep Loss Circuit (QN01) to shut off the drive to the CRTs if Horizontal deflec-
tion is lost.
(Continued on page 2)
PAGE 05-01
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