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DP-4X MICROPROCESSOR NTSC SYNC INPUT CIRCUIT EXPLANATION
NTSC SYNC CIRCUIT DIAGRAM.
(See Microprocessor Sync Input Circuit Diagram for Details)
The Microprocessor I004 must have Sync inputs from the Chassis to Lock its generation of OSD, Closed Cap-
tion, Customer's Menu, Service Menu, etc.....
The Chassis feeds back this information in the form of Blanking pulses from the Deflection Circuit and Sync
from the Video. The following describes the types of feedback sync signals and the pins on the Microprocessor
where these sync signals arrive.
(Pin 62) H BLK (Horizontal Blanking):
•
H Blk is input to the Microprocessor at Pin 62. H Blk is generated from the Deflection Transformer pulse
off pin 8 of T701, wave shaped by Q706. Then routed out the PDS2 connector pin 8 to the Signal PWB.
From here it is sent to the base of Q015 where it gets level shifted and inverted and into pin 62 of the Mi-
croprocessor. This signal is used for OSD Timing and Auto Programming.
(Pin 64) V BLK (Vertical Blanking):
•
V Blk is input to the Microprocessor at Pin 64. V Blk is generated from the Vertical Output IC I601 pin 8.
Then routed out the PDS2 connector pin 12 to the Signal PWB. From here it is sent to the base of Q016
where it gets level shifted and inverted and into pin 64 of the Microprocessor.
This signal is used for OSD Timing and will mute the Audio if this signal is lost at the Microprocessor.
(Pin 93) MAIN AFC (Automatic Frequency Control):
•
Main AFC is input to the Microprocessor at Pin 93. Main AFC is generated from the Main Tuner U301
pin 16. Then routed to Q305 and Q304. Then to pin 6 of the PTU2 connector. Then routed to Q041 and
Q042. Then into pin 93 of the Microprocessor.
This signal is used to align or adjust the precise Oscillator and Programmable divider settings within the Main
Tuner for proper Reception.
(Pin 92) SUB AFC (Automatic Frequency Control for PinP Tuner):
•
Sub AFC is input to the Microprocessor at Pin 92. Sub AFC is generated from the Sub Tuner U302 pin
16. Then routed to Q303 and Q302. Then to pin 19 of the PTU1 connector. Then routed to Q035 and
Q036. Then into pin 92 of the Microprocessor.
This signal is used to align or adjust the precise Oscillator and Programmable divider settings within the Sub
Tuner for proper Reception.
(Pin 23) M/S Sync Det (Main / Sub Sync Detection):
CLOSED CAPTION DATA and V. CHIP DATA:
•
The Microprocessor receives Main or Sub Sync information and strips the Closed Caption Data from line
21 during Vertical Blanking. This composite sync signal is supplied from the Main Video to the Micro-
processor from I005 pin 4. Then through Q010, Q012 and Q014 and then into pin 23. It uses this same
input for stripping V Chip Data.
NOTE: Component inputs other than 480i (NTSC) are not able to display Closed Caption Data.
AFC LOOP:
•
The Microprocessor also uses the Sync signal to activate the AFC loop and for Auto Programming for
both the Main Tuner and the PinP Tuner.
Main Tuner: When the channels are changed for the Main Tuner, the Microprocessor uses the Main
Composite Sync signal from I005 pin 4.
Sub Tuner: When the channels are changed for the PinP Tuner, the Microprocessor outputs a short con-
trol signal from pin 25 (SD Sel) to Q015 where its inverted. Then to I005 pin 9. I009 then outputs at pin
11 the Sub composite sync signal input on pin 5. Normally this IC outputs the Main composite sync sig-
nal input on pin 11.
(Pin 25) SD Select):
•
This Pin outputs a control signal to I005 for selection between Main and Sub Composite Sync.
PAGE 02-10
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