Introduction - Advantech MIC-3399 User Manual

6u compactpci blade sbc with 6th gen. intel core i3/i5/i7 processor and optional ecc memory
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3.1

Introduction

MIC-3399 supports the IPMI 2.0 interface and PICMG 2.9 R1.0 specification. The
BMC solution is based on Advantech IPMI Core G02 and is designed around a com-
bination of an NXP LPC1768 ARM Cortex-M3-based 32-bit microcontroller and a Lat-
tice MachXO2 series FPGA.
The microcontroller is running FreeRTOS as the basic OS, with Advantech's own
hardware abstraction layer (HAL) and IPMI stack.
The BMC's key features and functions are listed below.
Advantech Integrity Sensor
Based on the Advantech IPMI core and designed for CompactPCI.
IPMI 2.0 compliant
IPMI-over-LAN
Serial-over-LAN
KCS interface for direct IPMI communication between the OS and BMC
Full BMC watchdog support as defined in the IPMI specification
System event log (SEL)
HPM.1 for in-field updates supports:
Bootloader
Firmware
FPGA
BIOS
Automatic UART muxing between all serial interfaces for easy console access
Additional sensors for hardware monitoring
MIC-3399 User Manual
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