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MI/O-128™ Single Board Computer
Design Guide
V1.0
June 2018
1

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Summary of Contents for Advantech MI/O-128

  • Page 1 MI/O-128™ Single Board Computer Design Guide V1.0 June 2018...
  • Page 2 Chap. 1 I/O 128 Pin MIO series feature two 64-pin connectors, which one is DIP type and another is SMD type, for I/O extension, refer to Figure 1-1. This interface, including power input, inverter output, VGA, USB 2.0, GPIO and RS-232, can implement low speed functions directly.
  • Page 3 Figure 1-2 DIP 64-Pin Connector Symbol Name Name 12V Input 12V Input 12V Input 12V Input Inverter 5V Output Inverter ENBKL Inverter VBR Inverter 12V Output VGA DDC DAT VGA DDC CLK VGA RGB GND VGA RGB GND VGA Red VGA Green VGA Blue VGA RGB GND...
  • Page 4 USB0 D+ USB1 D+ USB Chassis GND LAN LINK100 LED- LAN LINK1000 LED- LAN ACT LED+ LAN ACT LED- LAN BI_DA+ LAN BI_DA- LAN BI_DB+ LAN BI_DB- LAN BI_DC+ LAN BI_DC- LAN BI_DD+ LAN BI_DD- LAN Chassis GND LAN Chassis GND Table 1-1 Pin Description of DIP 64-Pin Connector...
  • Page 5 Figure 1-3 SMD 64-Pin Connector Symbol Name Name Power Button Pin1 Power LED+ Power Button Pin2 Power LED- Reset Button Pin1 HDD LED+ Reset Button Pin2 HDD LED- SMB 5V Output SMB DAT SMB CLK I2C DAT I2C CLK GPIO 5VSB Output GPIO4 GPIO0 GPIO5...
  • Page 6 COM1 COM1 DSR# 422TX-/485D-/DCD# COM1 422TX+/485D+/RXD COM1 RTS# COM1 422RX+/TXD COM1 CTS# COM1 422RX-/DTR# COM1 RI# COM2 COM2 DSR# 422TX-/485D-/DCD# COM2 422TX+/485D+/RXD COM2 RTS# COM2 422RX+/TXD COM2 CTS# COM2 422RX-/DTR# COM2 RI# Table 1-2 Pin Description of SMD 64-Pin Connector...
  • Page 7: Signal Description

    1.1 Audio The HD Audio, which can provide DAC channels to support LOUT and stereo ADCs to support stereo MIC and LIN, is established on the CPU board. The audio signal MICL, MICR, LINL, LINR, LOUTL, LOUTR and AGND are the interface for audio application. 1.1.1 Signal Description Name Pin Type...
  • Page 8 1.1.2 Schematic Guidelines AGND is clear analog ground for audio, and all the audio signals should refer to it in CPU board. What’s more, one 0 ohm resistor for the return path connects the signal GDN with the audio AGND in CPU board. Considering EMI, the bead and capacitors are the recommendatory solution.
  • Page 9: Signal Descriptions

    1.2 VGA This interface can support one VGA port for display, and is compatible with WESA. As for the detail, users need to confirm CPU board manual first because the real specifications are based on chipsets. 1.2.1 Signal Descriptions Name Pin Type Power Rail Description...
  • Page 10 1.2.2 Schematic Guidelines Each RGB output (RED, GREEN, and BLUE) is terminated with one 150-Ω resistor near the chipset from the DAC output to the board ground. A second 150Ω resistor should be placed close to the CRT connector. Additionally, one 75-Ω termination resistor exists within the display.
  • Page 11 1.3 USB This interface can support USB 2.0 up to 4 ports, and four power pins which are with current rating up to 500mA per pin. USB ports can support high-speed (HS), full-speed (FS), and low-speed (LS) traffic. In addition, it features backward compatible to USB specification Revision 1.1, and support low speed I/O USB devices, such as keyboard and mouse.
  • Page 12 USB1 D- I/O USB2 USB2 Data- USB1 D+ I/O USB2 USB2 Data+ Table 1.3.1-2 Signal Description for USB in SMD 64-Pin 1.3.2 Schematic Guidelines Considering EMI and ESD issue, the common mode choke and TVS (Transient Voltage Suppression) diode with low capacitance, which should be less than 1.0pF, are the recommendatory solution.
  • Page 13 1.4 COM This interface can support RS-232 up to 4 ports and RS-422/485 up to 2 ports share with RS-232. The transmitters/receivers of RS-232/422/485, which integrate ESD protection, can reduce external ESD components. All the port functions can be configured by BIOS setting before users make use of this interface. 1.4.1 Signal Descriptions Name Pin Type...
  • Page 14 62 COM2 RI# 64 GND Table 1.4.1-1 Signal Description for COM 1.4.2 Schematic Guidelines As for general ESD protection, the transmitters/receivers of RS-232/422/485 in CPU board can meet the requirement, and users don’t implement extra ESD components. Considering EMI, the bead and capacitors are the recommendatory solution. For placement concern, EMI solution should be close to connector.
  • Page 15 1.5 LAN One LAN port in this interface enables 1000BASE-T implementations using an integrated PHY and transformer in CPU board, and therefore one RJ45 connector without transformer can complete the Ethernet application. In addition, linking and active LED functions can indicate LAN port status for front panel in system. 1.5.1 Signal Descriptions Name Pin Type...
  • Page 16: Cpu Board

    CPU Board I/O Board LAN BI_DA+ LAN BI_DA- LAN BI_DB+ LAN BI_DC+ LAN BI_DC- LAN BI_DB- PTH_1 PTH_2 LAN BI_DD+ NPTH_1 LAN BI_DD- NPTH_2 LAN_LINK1000_LED- GND_Chasis LED1_+G-O LAN_LINK100_LED- LED1_-G+O LAN_ACT_LED+ LED2_+G LAN_ACT_LED- LED2_-G RJ45_LED_G+O/G Figure 1.5.2-1 Demonstration for LAN Application...
  • Page 17 1.6 Others The other functions in this interface are power input, inverter, front panel, SMBus, I2C, LEDs, and GPIO. 1.6.1 Signal Descriptions Name Pin Type Power Rail Description 12V Input Power Input Power input for MB. 12V Input Power Input Power input for MB.
  • Page 18 Table 1.6.1-1 Signal Description for Others in DIP 64-Pin Name Pin Type Power Rail Description Power Button Input 3.3VSB Power Button Pin1 Power Button Pin2 Reset Button Pin1 Input 3.3V Reset Button Reset Button Pin2 GND SMB DAT SMBus Data I2C DAT I2C Data GPIO 5VSB...
  • Page 19 GPIO (with Internal GPIO5 5VSB pull up to 5VSB) GPIO (with Internal GPIO6 5VSB pull up to 5VSB) GPIO (with Internal GPIO7 5VSB pull up to 5VSB) Table 1.6.1-2 Signal Description for Others in SMD 64-Pin...
  • Page 20 1.7 General Layout Guidelines This section provides general layout guideline for high speed signals, PCI Express, USB and Display port. 1.7.1 Impedance In a high-speed signaling environment, signal trace impedances must be controlled in order to maintain good signal quality across the motherboard. Signal trace impedance is a function of the following three factors: •...
  • Page 21: Side View

    Trace Crossing Plane Splits Stitching Cap Trace Trace Side View Reference Plane 1 Reference Plane 2 Trace Trace TOP View Reference Plane 1 Reference Plane 2 Figure 1.7-1 Trace Crossing Plane Splits 1.7.5 Referencing Different Plane Layers When signal traces change layers, ground stitching via should be placed amongst the signal via in order to provide a return path.
  • Page 22 1.7.6 Differential pair routing It is important to maintain routing symmetry between the two signals of a differential pair. Failure to maintain symmetry between the signals of the differential pair will introduce an AC common mode voltage. Preferred: Symmetrical Routing Avoid: Non-symmetrical Routing Figure 1.7-3 Symmetrical Routing for differential pair There is only one lane, and each link will be routed to different devices at varied...
  • Page 23 Match near mismatch Avoid Figure 1.7-5 length matching compensation near mismatch When serpentining is needed to match lengths, the following guidelines should be maintained. The trace spacing should not become greater than 2 times the original spacing. The length of the increased spacing should not be greater than 3 times the trace width.