Parallel Port (Cn27) - Aaeon GENE-LN05 Manual

S u b C o m p a c t B o a r d
BIOS Setting
(I2C address)
Port 1 @6Eh
Port 2 @6Eh
Port 3 @6Eh
Port 4 @6Eh
Port 5 @6Eh
Port 6 @6Eh
Port 7 @6Eh
Port 8 @6Eh

2.40 Parallel Port (CN27)

Pin Signal
1 STB
3 D0
5 D1
7 D2
9 D3
11 D4
13 D5
15 D6
17 D7
19 ACK#
21 BUSY
23 PE
25 SLCT
Address(Register)
Connector
Definition
Output
Pin 1 21h/Bit 0
Pin 2 21h/Bit 1
Pin 3 21h/Bit 2
Pin 4 21h/Bit 3
Pin 5 21h/Bit 4
Pin 6 21h/Bit 5
Pin 7 21h/Bit 6
Pin 8 21h/Bit 7
G E N E - L N 0 5 R e v . B
F75111 GPIO Setting
Input
22h/Bit 0 U69 Pin 6 (GPIO 20)
22h/Bit 1 U69 Pin 7 (GPIO 21)
22h/Bit 2 U69 Pin 8 (GPIO 22)
22h/Bit 3 U69 Pin 24(GPIO 23)
22h/Bit 4 U69 Pin 23(GPIO 24)
22h/Bit 5 U69 Pin 22(GPIO 25)
22h/Bit 6 U69 Pin 21(GPIO 26)
22h/Bit 7 U69 Pin 20(GPIO 27)
P i n S i g n a l
2 AFD#
4 ERROR#
6 PINIT#
8 SLIN#
10 Ground
12 Ground
14 Ground
16 Ground
18 Ground
20 Ground
22 Ground
24 Ground
26 N/C
Chapter 2 Quick Installation Guide
2-21