Figure 24. Cm-2 Reve Schematic Page 3 Of 7 - Cirrus Logic CobraNet Silicon Series Hardware User Manual

CobraNet Hardware User's Manual
Mechanical Drawings and Schematics
ADDR[0..19]
44
ADDR[0..19]
9
NC/A19
ADDR19 16
NC/A18
ADDR18 17
A17
ADDR17 48
A16
ADDR16 1
A15
ADDR15 2
A14
ADDR14 3
A13
ADDR13 4
A12
ADDR12 5
A11
ADDR11 6
A10
ADDR10 7
A9
ADDR9 8
A8
ADDR8 18
A7
ADDR7 19
A6
ADDR6 20
A5
ADDR5 21
A4
ADDR4 22
A3
ADDR3 23
A2
ADDR2 24
A1
ADDR1 25
A0
HRESET_BUF# 12
HRESET_BUF# RESET#
10
NC

Figure 24. CM-2 RevE Schematic Page 3 of 7

©
Copyright 2004 Cirrus Logic, Inc.
VCC_+3.3
U5
45 ADDR0
D15/A-1
43
D14
41
D13
39
D12
36
D11
34
D10
32
D9
30 DATA[0..15]
D8
44 DATA7
D7
42 DATA6
D6
40 DATA5
D5
38 DATA4
D4
35 DATA3
D3
33 DATA2
D2
31 DATA1
D1
29 DATA0
D0
47
BYTE# GND
13
NC/VPP VCC_+3.3
14
NC/WP# VCC_+3.3
15
NC/RY/BY#
26 FLASH_CS#
CE#
11 WE#
WE#
28 OE#
OE#
FLASH_TSOP
VCC_+3.3
C23
0.1 uF
DATA[0..15]
FLASH_CS#
WE#
OE#
DS651UM21
Version 2.1