Advanced Chipset Features; Dram Timing Selectable; Cas Latency Time; Dram Ras# To Cas# Delay - Advantech PCA-6008G2 User Manual

3.5

Advanced Chipset Features

By choosing the "Advanced Chipset Features" option from the "Initial Setup Screen"
menu, the screen below will be displayed. This sample screen contains the manufac-
turer's default values for the PCA-6008, as shown in Figure 3-4:
Note! DRAM default timings have been carefully chosen and should ONLY be
changed if data is being lost. Please first contact technical support.
3.5.1

DRAM Timing Selectable

This item allows you to control the DRAM speed. The selections are "Manual" or "By
SPD".
3.5.2

CAS Latency Time

When the DRAM Timing Selectable is set to [Manual], this field is adjustable. The
category controls the CAS latency, which determines the time interval between
SDRAM starting a read command and receiving it. Setting options: [3T], [4T], [5T],
[Auto].
3.5.3

DRAM RAS# to CAS# Delay

When the DRAM Timing selectable is set to [Manual], this field is adjustable. When
DRAM is refreshed, the rows and columns are addressed separately. This setup item
allows user to determine the timing of the transition from RAS (row address strobe) to
CAS (column address strobe). The less the clock cycles are, the faster the DRAM
speed is. Setting options: [2T] to [5T], [Auto].
3.5.4

DRAM RAS# Precharge

When the DRAM Timing Selectable is set to [Manual], this field is adjustable. This
setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to
Figure 3.4 Advanced chipset features screen
31 PCA-6008G2 User Manual