YOKOGAWA WE7281 User Manual page 47

4-ch, 100 ks/s d/a module
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During Arbitrary Waveform (AG) Output
Synchronized Operation
IM 707281-01E
Maximum D/A sampling interval
10 µs
Sampling clock source
Internal, or the time base signal (CMNCLK) of the measuring station
Internal clock interval
10 µs to 10 s
Internal clock interval resolution
10 µs
Memory length
1 MWord/CH (at 4 CH), 2 MWord/CH (at 2CH), or 4 MWord/CH (at 1CH)
Memory partitions
1, 2, 4, 8, 16, 32, 64, 128, or 256
Waveform pattern length
10 to (memory length/the number of memory paritions)
Waveform output mode
Single, continuous, single by triggering, and continuous by triggering
Trigger source
Manual, bus trigger signal (BUSTRG1/BUSTRG2) of the measuring station.
Bus trigger output
Output at an arbitrary sample of the specified channel.
Bus trigger output time accuracty
± (sampling interval + 7.5 µs)
Skew between channels
: 1.5 µs (typical value*
Within the same module
Between adjacent modules : 1.6 µs (typical value*
1
*
Using an output cable of length 3 m or less.
*2
Typical value represents a typical or average value. It is not strictly guaranteed.
5.1 Performance Specifications
2
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2
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5
5-3

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