Signal Multiplex Logic; Onboard Mux Settings And Control - Texas Instruments DRA72 Series User Manual

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Signal Multiplex Logic

Due to the high level of multiplexing on the SoC (16+ levels), multiplex control logic is required to use
different signals on the same SoC pins with their various functionality. The information below provides
description of the logic.
An I2C-based IO expander is used to control the onboard muxes.
assigned to each mux, as well as the specific settings for the various selections.
MUX Control Bits
A
C (RU21) SW5.3
EXP3.P[12:11]
B (RU88, RU94, EXP2.P[7,0]
RU33)
E (RU30) EXP3.P[6,2]
F (RU93) EXP3.P[12,11]
K (RU111) EXP2.P16
L (RU113) EXP2.P3
J (RU95) EXP2.P4
M (RU117) EXP3.P13
G (RU96) SW5.7
H (RU99) EXP3.P1
SPRUIB9 – December 2016
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Table 19. Onboard Mux Settings and Control
Value
n/a n/a
n/a
OFF
ON
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
OFF
ON
0
1
Copyright © 2016, Texas Instruments Incorporated
Table 19
Mux Setting
QSPI Memory (default)
NOR Memory (Requires resistor change)
NOR Memory
EMMC Memory
Reserved
NOR Memory selected (by SW5.2)
EMMC Memory selected (by SW5.3)
NOR Memory selected (default)
Reserved
VIN1A to Expansion
VOUT3 to LCD Panel
GPMC NOR/NAND (default)
Reserved
VIN2A to LI Camera
VIN2A to Expansion
Reserved (default)
Reserved
VIN2A to LI Camera
VIN2A to Expansion
RGMII1 to Ethernet Port 1 (default)
UART3 to COM8Q
Route to Expansion (SPI2) (default)
Route to Expansion (I2C3)
Route to DCAN2 Connector (default)
Route to Expansion (VIN1B)
RGMII0 to Ethernet Port 0 (default)
Route to Expansion (VIN2B)
Route to Expansion (MMC3/legacy)(default)
Use Default NOR Address (default)
Use Alternate NOR Address (w/ EMMC)
Route to COM8Q (MASP3/7)
Route to Expansion (McASP3/7)(default)
DRA72x EVM CPU Board User's Guide
Signal Multiplex Logic
shows the specific bits
23