Rabbit RabbitCore RCM3100 User Manual page 47

C-programmable module
Hide thumbs Also See for RabbitCore RCM3100:
Table of Contents

Advertisement

Distributor of Digi International: Excellent Integrated System Limited
Datasheet of 101-0533 - KIT DEV RABBIT3000/RCM3100
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
Table A-4 lists the delays in gross memory access time for V
Table A-4. Data and Clock Delays V
Clock to Address Output Delay
VDD
30 pF
3.3
6
The measurements are taken at the 50% points under the following conditions.
• T = -40°C to 85°C, V = V
• Internal clock to nonloaded CLK pin delay ≤ 1 ns @ 85°C/3.0 V
The clock to address output delays are similar, and apply to the following delays.
• T
, the clock to address delay
adr
• T
, the clock to memory chip select delay
CSx
• T
, the clock to memory write strobe delay
WEx
• T
, the clock to I/O chip select delay
IOCSx
• T
, the clock to I/O read strobe delay
IORD
• T
, the clock to I/O write strobe delay
IOWR
• T
, the clock to I/O buffer enable delay
BUFEN
The data setup time delays are similar for both T
When the spectrum spreader is enabled with the clock doubler, every other clock cycle is
shortened (sometimes lengthened) by a maximum amount given in the table above. The
shortening takes place by shortening the high part of the clock. If the doubler is not
enabled, then every clock is shortened during the low part of the clock period. The maxi-
mum shortening for a pair of clocks combined is shown in the table.
40
±10%, Temp, -40°C–+85°C (maximum)
DD
(ns)
Data Setup
Time Delay
60 pF
90 pF
8
11
±10%
DD
setup
= 3.3 V.
DD
Spectrum Spreader Delay
(ns)
Normal
(ns)
dbl/no dbl
1
3/4.5
and T
.
hold
RabbitCore RCM3100
Strong
dbl/no dbl
4.5/9

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the RabbitCore RCM3100 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

This manual is also suitable for:

Rabbitcore rcm3110

Table of Contents