Jtag Connector; Connectors - Cypress CYW943907AEVAL1F User Manual

4.6 JTAG Connector

4.6.1 Onboard Programmer/Debugger and Serial Interface Chip
The onboard programmer/debugger chip uses JTAG to program/debug the CYW43907-based SiP module.
Table 4-6 shows the connection between CYW43907 and the onboard programmer/debugger chip. In addition to the
connections listed in the table, JTAG_SEL and GPIO_8_TAP_SEL lines have been pulled HIGH to make sure
programming/debugging is enabled through JTAG in CYW43907.
Table 4-6. Connection between CYW43907 and Onboard Programmer/Debugger
Sl. No.
1
2
3
4
5

4.7 Connectors

4.7.1 WICED Header
J6 is the WICED header available on the CYW943907AEVAL1F EVK. This is a 44-pin header containing I
SPI, PWM lines, and I/Os. Note that some signals are shared with the Arduino header (UART0 Tx/Rx) and Onboard
Programmer/debugger chip (UART1).
EVAL BOARD HEADER
J6.1
J6.2
J6.3
J6.4
J6.5
J6.6
CYW943907AEVAL1F Evaluation Kit User Guide, Doc. No. 002-18703 Rev. *B
Figure 4-6. Micro SD Connector Circuit Diagram
CYW43907-Based SIP Pin Name
GPIO_2_JTAG_TCK
GPIO_3_JTAG_TMS
GPIO_4_JTAG_TDI
GPIO_5_JTAG_TDO
GPIO_6_JTAG_TRST_L
Table 4-7 illustrates the J6 pinout.
Table 4-7. WICED Header Pinout
CYW43907 PIN NAME
PWM_4
PWM_5
I2S0_MCK
I2S0_SD_OUT
I2S0_SCK_BCLK
I2S0_WS_LRCLK
Onboard Programmer/Debugger Connection
FTDI_JTAG_TCK
FTDI_JTAG_TMS
FTDI_JTAG_TDI
FTDI_JTAG_TDO
FTDI_JTAG_TRST
SDK ENUMERATION
WICED_GPIO_17
WICED_GPIO_18
WICED_GPIO_28
WICED_GPIO_32
WICED_GPIO_29
WICED_GPIO_30
Hardware
2
C, SDIO, UART,
ALTERNATE ENUMERATION
WICED_PWM_5
WICED_BUTTON1
WICED_I2S_1
WICED_I2S_1
WICED_I2S_1
WICED_I2S_1
33