RESEARCH CONCEPTS RC2000A DUAL AXIS Instructions Manual page 69

RC2000A Dual Axis Antenna Controller
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Mnemonics Description
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STX
ETX
Checksum LRC byte
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States Description
State 1 (Slave Idle State). In State 1, a slave is ready to receive a new message, and therefore, must
complete any previous message reception. A slave always powers on in State 1.
A slave will exit State 1 and enter State 2 (Slave Addressed State) only if STX byte is received.
State 2 (Slave Addressed State). In State 2, a slave is waiting to receive the address byte, the second
byte of a command message.
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Table 1. State Diagram Mnemonics
Start-of-Text ASCII control character, used as a header in command messages
to identify the beginning of a new message.
End-of-Text ASCII control character, used as a termination character in
messages to identify the end of data.
(Longitudinal Redundancy Check) is a last byte in the message data block.
The value of LRC byte is the exclusive OR of all message bytes including the
STX and the ETX bytes and is used to detect errors during transmission of
data.
Appendix D RCI RS-422 Specification
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